Lines Matching refs:RREG32

287           bus_cntl = RREG32(R600_BUS_CNTL);
288           d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
289           d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
290           vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
291           rom_cntl = RREG32(R600_ROM_CNTL);
335           viph_control = RREG32(RADEON_VIPH_CONTROL);
336           bus_cntl = RREG32(R600_BUS_CNTL);
337           d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
338           d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
339           vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
340           rom_cntl = RREG32(R600_ROM_CNTL);
357                     cg_spll_func_cntl = RREG32(R600_CG_SPLL_FUNC_CNTL);
366                               cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
381                               cg_spll_status = RREG32(R600_CG_SPLL_STATUS);
410           viph_control = RREG32(RADEON_VIPH_CONTROL);
411           bus_cntl = RREG32(R600_BUS_CNTL);
412           d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
413           d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
414           vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
415           rom_cntl = RREG32(R600_ROM_CNTL);
416           general_pwrmgt = RREG32(R600_GENERAL_PWRMGT);
417           low_vid_lower_gpio_cntl = RREG32(R600_LOW_VID_LOWER_GPIO_CNTL);
418           medium_vid_lower_gpio_cntl = RREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
419           high_vid_lower_gpio_cntl = RREG32(R600_HIGH_VID_LOWER_GPIO_CNTL);
420           ctxsw_vid_lower_gpio_cntl = RREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
421           lower_gpio_enable = RREG32(R600_LOWER_GPIO_ENABLE);
486           seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);
487           viph_control = RREG32(RADEON_VIPH_CONTROL);
488           bus_cntl = RREG32(RV370_BUS_CNTL);
489           d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);
490           d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
491           vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL);
492           gpiopad_a = RREG32(RADEON_GPIOPAD_A);
493           gpiopad_en = RREG32(RADEON_GPIOPAD_EN);
494           gpiopad_mask = RREG32(RADEON_GPIOPAD_MASK);
547           seprom_cntl1 = RREG32(RADEON_SEPROM_CNTL1);
548           viph_control = RREG32(RADEON_VIPH_CONTROL);
550                     bus_cntl = RREG32(RV370_BUS_CNTL);
552                     bus_cntl = RREG32(RADEON_BUS_CNTL);
553           crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL);
555           crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);
561                     fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
565                     crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);