Lines Matching refs:vmid
269 entry->src_id, entry->ring_id, entry->vmid, in gmc_v9_0_process_interrupt()
294 static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vmid) in gmc_v9_0_get_invalidate_req() argument
300 PER_VMID_INVALIDATE_REQ, 1 << vmid); in gmc_v9_0_get_invalidate_req()
329 uint32_t vmid) in gmc_v9_0_flush_gpu_tlb() argument
339 u32 tmp = gmc_v9_0_get_invalidate_req(vmid); in gmc_v9_0_flush_gpu_tlb()
346 tmp &= 1 << vmid; in gmc_v9_0_flush_gpu_tlb()
357 tmp &= 1 << vmid; in gmc_v9_0_flush_gpu_tlb()
372 unsigned vmid, uint64_t pd_addr) in gmc_v9_0_emit_flush_gpu_tlb() argument
376 uint32_t req = gmc_v9_0_get_invalidate_req(vmid); in gmc_v9_0_emit_flush_gpu_tlb()
383 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid), in gmc_v9_0_emit_flush_gpu_tlb()
386 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + (2 * vmid), in gmc_v9_0_emit_flush_gpu_tlb()
391 req, 1 << vmid); in gmc_v9_0_emit_flush_gpu_tlb()
396 static void gmc_v9_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned vmid, in gmc_v9_0_emit_pasid_mapping() argument
403 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid; in gmc_v9_0_emit_pasid_mapping()
405 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT_MM) + vmid; in gmc_v9_0_emit_pasid_mapping()