Lines Matching refs:code

40 * Assembler::         Representing @code{asm} with operands.
61 @code{rtx}.
63 An integer is simply an @code{int}; their written form uses decimal
65 @code{HOST_WIDE_INT}; their written form uses decimal digits.
68 @code{char *} in usual C fashion, and it is written in C syntax as well.
72 pointers instead of strings are valid.  Within RTL code, strings are most
73 commonly found inside @code{symbol_ref} expressions, but they appear in
84 code is embedded in a machine description.  Wherever a string can
88 special.  Therefore, if you write string constants in the C code, you
103 codes).  The expression code is a name defined in @file{rtl.def}, which is
105 codes and their meanings are machine-independent.  The code of an RTX can
106 be extracted with the macro @code{GET_CODE (@var{x})} and altered with
107 @code{PUT_CODE (@var{x}, @var{newcode})}.
109 The expression code determines how many operands the expression contains,
112 from its context---from the expression code of the containing expression.
113 For example, in an expression of code @code{subreg}, the first operand is
115 an expression of code @code{plus}, there are two operands, both of which
116 are to be regarded as expressions.  In a @code{symbol_ref} expression,
123 Expression code names in the @samp{md} file are written in lowercase,
124 but when they appear in C code they are written in uppercase.  In this
125 manual, they are shown as follows: @code{const_int}.
130 wanted.  The written form of this is @code{(nil)}.
141 of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
144 @table @code
146 An RTX code that represents an actual object, such as a register
147 (@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
148 @code{LO_SUM}) is also included; instead, @code{SUBREG} and
149 @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
152 An RTX code that represents a constant object.  @code{HIGH} is also
156 An RTX code for a non-symmetric comparison, such as @code{GEU} or
157 @code{LT}.
160 An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
161 or @code{ORDERED}.
164 An RTX code for a unary arithmetic operation, such as @code{NEG},
165 @code{NOT}, or @code{ABS}.  This category also includes value extension
169 An RTX code for a commutative binary operation, such as @code{PLUS} or
170 @code{AND}.  @code{NE} and @code{EQ} are comparisons, so they have class
171 @code{<}.
174 An RTX code for a non-commutative binary operation, such as @code{MINUS},
175 @code{DIV}, or @code{ASHIFTRT}.
178 An RTX code for a bit-field operation.  Currently only
179 @code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}.  These have three inputs
184 An RTX code for other three input operations.  Currently only
185 @code{IF_THEN_ELSE},  @code{VEC_MERGE}, @code{SIGN_EXTRACT},
186 @code{ZERO_EXTRACT}, and @code{FMA}.
189 An RTX code for an entire instruction:  @code{INSN}, @code{JUMP_INSN}, and
190 @code{CALL_INSN}.  @xref{Insns}.
193 An RTX code for something that matches in insns, such as
194 @code{MATCH_DUP}.  These only occur in machine descriptions.
197 An RTX code for an auto-increment addressing mode, such as
198 @code{POST_INC}.
202 only in machine descriptions (@code{DEFINE_*}, etc.).  It also includes
203 all the codes describing side effects (@code{SET}, @code{USE},
204 @code{CLOBBER}, etc.) and the non-insns that may appear on an insn
205 chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
206 @code{SUBREG} is also part of this class.
210 For each expression code, @file{rtl.def} specifies the number of
212 called the @dfn{format} of the expression code.  For example,
213 the format of @code{subreg} is @samp{ei}.
218 @table @code
237 @table @code
244 in debugging dumps.  It is used for the line number or code number of a
245 @code{note} insn.
269 of an expression code:
271 @table @code
273 @item GET_RTX_LENGTH (@var{code})
274 Number of operands of an RTX of code @var{code}.
277 @item GET_RTX_FORMAT (@var{code})
278 The format of an RTX of code @var{code}, as a C string.
282 is safe to assume that all comparison operations have format @code{ee}.
284 @table @code
286 All codes of this class have format @code{e}.
291 All codes of these classes have format @code{ee}.
295 All codes of these classes have format @code{eee}.
298 All codes of this class have formats that begin with @code{iuueiee}.
300 are of class @code{i}.
318 Operands of expressions are accessed using the macros @code{XEXP},
319 @code{XINT}, @code{XWINT} and @code{XSTR}.  Each of these macros takes
335 accesses the same operand as an integer.  @code{XSTR}, used in the same
340 stored in the operand.  You would do this based on the expression code of
344 For example, if @var{x} is a @code{subreg} expression, you know that it has
345 two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
346 and @code{XINT (@var{x}, 1)}.  If you did @code{XINT (@var{x}, 0)}, you
349 @code{(int) XEXP (@var{x}, 0)}.  @code{XEXP (@var{x}, 1)} would also
352 accessed.  Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
357 macro @code{XVEC} to get the vector-pointer itself, or the macros
358 @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
361 @table @code
369 in operand number @var{idx} in @var{exp}.  This value is an @code{int}.
377 and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
390 @table @code
392 @table @code
396 @var{x} can only alias @code{MEM}s in a conflicting alias set.  This value
401 These set numbers are tested with @code{alias_sets_conflict_p}.
407 @code{COMPONENT_REF}, in which case this is some field reference,
408 and @code{TREE_OPERAND (@var{x}, 0)} contains the declaration,
409 or another @code{COMPONENT_REF}, or null if there is no compile-time
414 True if the offset of the memory reference from @code{MEM_EXPR} is known.
419 The offset from the start of @code{MEM_EXPR}.  The value is only valid if
430 This is mostly relevant for @code{BLKmode} references as otherwise
445 @table @code
464 @table @code
467 If the @code{symbol_ref} @var{x} was created for a @code{VAR_DECL} or
468 a @code{FUNCTION_DECL}, that tree is recorded here.  If this value is
469 null, then @var{x} was created by back end code generation routines,
472 @code{SYMBOL_REF_DECL} may also point to a tree of class @code{'c'},
473 that is, some sort of constant.  In this case, the @code{symbol_ref}
484 A field of opaque type used to store @code{SYMBOL_REF_DECL} or
485 @code{SYMBOL_REF_CONSTANT}.
489 In a @code{symbol_ref}, this is used to communicate various predicates
491 common code, some are specific to the target.  The common bits are:
493 @table @code
503 See @code{TARGET_BINDS_LOCAL_P}.
509 Note that this is not the inverse of @code{SYMBOL_FLAG_LOCAL}.
515 See @code{TARGET_IN_SMALL_DATA_P}.
520 This is a multi-bit field accessor that returns the @code{tls_model}
527 Set if the symbol has @code{SYMBOL_REF_BLOCK} and
528 @code{SYMBOL_REF_BLOCK_OFFSET} fields.
535 are symbols that have a known position within an @code{object_block}
539 If this flag is set, then @code{SYMBOL_FLAG_HAS_BLOCK_INFO} will be too.
542 Bits beginning with @code{SYMBOL_FLAG_MACH_DEP} are available for
550 or @code{NULL} if it has not been assigned a block.
568 @table @code
570 @cindex @code{symbol_ref} and @samp{/u}
571 @cindex @code{unchanging}, in @code{symbol_ref}
573 Nonzero in a @code{symbol_ref} if it refers to part of the current
575 @code{.rodata} section entirely separate from the function, but for
579 Stored in the @code{unchanging} field and printed as @samp{/u}.
582 @cindex @code{call_insn} and @samp{/u}
583 @cindex @code{unchanging}, in @code{call_insn}
585 In a @code{call_insn} indicates that the insn represents a call to a
586 const function.  Stored in the @code{unchanging} field and printed as
590 @cindex @code{call_insn} and @samp{/i}
591 @cindex @code{return_val}, in @code{call_insn}
593 In a @code{call_insn} indicates that the insn represents a call to a
594 pure function.  Stored in the @code{return_val} field and printed as
598 @cindex @code{call_insn} and @samp{/u} or @samp{/i}
600 In a @code{call_insn}, true if @code{RTL_CONST_CALL_P} or
601 @code{RTL_PURE_CALL_P} is true.
604 @cindex @code{call_insn} and @samp{/c}
605 @cindex @code{call}, in @code{call_insn}
607 In a @code{call_insn} indicates that the insn represents a possibly
609 @code{call} field and printed as @samp{/c}.  Only true if one of
610 @code{RTL_CONST_CALL_P} or @code{RTL_PURE_CALL_P} is true.
613 @cindex @code{jump_insn} and @samp{/u}
614 @cindex @code{call_insn} and @samp{/u}
615 @cindex @code{insn} and @samp{/u}
616 @cindex @code{unchanging}, in @code{jump_insn}, @code{call_insn} and @code{insn}
618 In a @code{jump_insn}, @code{call_insn}, or @code{insn} indicates
620 @code{sequence} below.  Stored in the @code{unchanging} field and
624 @cindex @code{insn} and @samp{/v}
625 @cindex @code{call_insn} and @samp{/v}
626 @cindex @code{jump_insn} and @samp{/v}
627 @cindex @code{code_label} and @samp{/v}
628 @cindex @code{barrier} and @samp{/v}
629 @cindex @code{note} and @samp{/v}
630 @cindex @code{volatil}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label}, @cod…
632 In an @code{insn}, @code{call_insn}, @code{jump_insn}, @code{code_label},
633 @code{barrier}, or @code{note},
635 @code{volatil} field and printed as @samp{/v}.
638 @cindex @code{insn} and @samp{/s}
639 @cindex @code{jump_insn} and @samp{/s}
640 @cindex @code{call_insn} and @samp{/s}
641 @cindex @code{in_struct}, in @code{insn} and @code{jump_insn} and @code{call_insn}
643 In an @code{insn} or @code{jump_insn} or @code{call_insn} in a delay
646 @code{INSN_ANNULLED_BRANCH_P} set, this insn will only be executed if
648 @code{INSN_FROM_TARGET_P} clear, the insn will be executed only if the
649 branch is not taken.  When @code{INSN_ANNULLED_BRANCH_P} is not set,
650 this insn will always be executed.  Stored in the @code{in_struct}
654 @cindex @code{code_label} and @samp{/i}
655 @cindex @code{note} and @samp{/i}
656 @cindex @code{in_struct}, in @code{code_label} and @code{note}
658 In a @code{code_label} or @code{note}, indicates that the label is referenced by
659 code or data not visible to the RTL of a given function.
661 in the @code{in_struct} field and printed as @samp{/s}.
664 @cindex @code{label_ref} and @samp{/v}
665 @cindex @code{reg_label} and @samp{/v}
666 @cindex @code{volatil}, in @code{label_ref} and @code{reg_label}
668 In @code{label_ref} and @code{reg_label} expressions, nonzero if this is
670 Stored in the @code{volatil} field and printed as @samp{/v}.
673 @cindex @code{mem} and @samp{/j}
674 @cindex @code{jump}, in @code{mem}
676 In @code{mem} expressions, 1 if we should keep the alias set for this
679 Stored in the @code{jump} field and printed as @samp{/j}.
682 @cindex @code{mem} and @samp{/v}
683 @cindex @code{asm_input} and @samp{/v}
684 @cindex @code{asm_operands} and @samp{/v}
685 @cindex @code{volatil}, in @code{mem}, @code{asm_operands}, and @code{asm_input}
687 In @code{mem}, @code{asm_operands}, and @code{asm_input} expressions,
689 Stored in the @code{volatil} field and printed as @samp{/v}.
692 @cindex @code{mem} and @samp{/c}
693 @cindex @code{call}, in @code{mem}
695 In @code{mem}, nonzero for memory references that will not trap.
696 Stored in the @code{call} field and printed as @samp{/c}.
699 @cindex @code{mem} and @samp{/f}
700 @cindex @code{frame_related}, in @code{mem}
702 Nonzero in a @code{mem} if the memory reference holds a pointer.
703 Stored in the @code{frame_related} field and printed as @samp{/f}.
706 @cindex @code{reg} and @samp{/i}
707 @cindex @code{return_val}, in @code{reg}
709 Nonzero in a @code{reg} if it is the place in which this function's
711 register.)  Stored in the @code{return_val} field and printed as
715 @cindex @code{reg} and @samp{/f}
716 @cindex @code{frame_related}, in @code{reg}
718 Nonzero in a @code{reg} if the register holds a pointer.  Stored in the
719 @code{frame_related} field and printed as @samp{/f}.
722 @cindex @code{reg} and @samp{/v}
723 @cindex @code{volatil}, in @code{reg}
725 In a @code{reg}, nonzero if it corresponds to a variable present in
726 the user's source code.  Zero for temporaries generated internally by
727 the compiler.  Stored in the @code{volatil} field and printed as
731 functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
735 @cindex @code{insn} and @samp{/f}
736 @cindex @code{call_insn} and @samp{/f}
737 @cindex @code{jump_insn} and @samp{/f}
738 @cindex @code{barrier} and @samp{/f}
739 @cindex @code{set} and @samp{/f}
740 @cindex @code{frame_related}, in @code{insn}, @code{call_insn}, @code{jump_insn}, @code{barrier}, a…
742 Nonzero in an @code{insn}, @code{call_insn}, @code{jump_insn},
743 @code{barrier}, or @code{set} which is part of a function prologue
747 Stored in the @code{frame_related} field and printed as @samp{/f}.
756 @code{RTX_FRAME_RELATED_P}.
759 @code{dwarf2out_frame_debug_expr} can handle), you will also have to
760 create a @code{REG_FRAME_RELATED_EXPR} note and attach it to the
763 @code{dwarf2out_frame_debug_expr} can handle.
769 @cindex @code{mem} and @samp{/u}
770 @cindex @code{unchanging}, in @code{mem}
772 Nonzero in a @code{mem}, if the memory is statically allocated and read-only.
781 Stored in the @code{unchanging} field and printed as @samp{/u}.
784 @cindex @code{insn} and @samp{/s}
785 @cindex @code{call_insn} and @samp{/s}
786 @cindex @code{jump_insn} and @samp{/s}
787 @cindex @code{in_struct}, in @code{insn}, @code{jump_insn} and @code{call_insn}
789 During instruction scheduling, in an @code{insn}, @code{call_insn} or
790 @code{jump_insn}, indicates that the
793 instruction scheduling pass, for example, @code{use} insns before
794 a @code{call_insn} may not be separated from the @code{call_insn}.
795 Stored in the @code{in_struct} field and printed as @samp{/s}.
798 @cindex @code{insn} and @samp{/j}
799 @cindex @code{jump}, in @code{insn}
801 For a @code{set}, nonzero if it is for a return.
802 Stored in the @code{jump} field and printed as @samp{/j}.
805 @cindex @code{call_insn} and @samp{/j}
806 @cindex @code{jump}, in @code{call_insn}
808 For a @code{call_insn}, nonzero if the insn is a sibling call.
809 Stored in the @code{jump} field and printed as @samp{/j}.
812 @cindex @code{symbol_ref} and @samp{/f}
813 @cindex @code{frame_related}, in @code{symbol_ref}
815 For a @code{symbol_ref} expression, nonzero if it addresses this function's
817 Stored in the @code{frame_related} field and printed as @samp{/f}.
820 @cindex @code{subreg} and @samp{/u} and @samp{/v}
821 @cindex @code{unchanging}, in @code{subreg}
822 @cindex @code{volatil}, in @code{subreg}
824 Returns a value greater then zero for a @code{subreg} that has
825 @code{SUBREG_PROMOTED_VAR_P} nonzero if the object being referenced is kept
827 extended some other way via the @code{ptr_extend} instruction.
828 Stored in the @code{unchanging}
829 field and @code{volatil} field, printed as @samp{/u} and @samp{/v}.
831 the value.  Use @code{SUBREG_PROMOTED_UNSIGNED_SET} to change the value.
834 @cindex @code{subreg} and @samp{/u}
835 @cindex @code{unchanging}, in @code{subreg}
836 @cindex @code{volatil}, in @code{subreg}
838 Set the @code{unchanging} and @code{volatil} fields in a @code{subreg}
839 to reflect zero, sign, or other extension.  If @code{volatil} is
840 zero, then @code{unchanging} as nonzero means zero extension and as
841 zero means sign extension.  If @code{volatil} is nonzero then some
842 other type of extension was done via the @code{ptr_extend} instruction.
845 @cindex @code{subreg} and @samp{/s}
846 @cindex @code{in_struct}, in @code{subreg}
848 Nonzero in a @code{subreg} if it was made when accessing an object that
849 was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
851 the @code{subreg} is the declared mode of the object and the mode of
852 @code{SUBREG_REG} is the mode of the register that holds the object.
854 mode on every assignment.  Stored in the @code{in_struct} field and
858 @cindex @code{used}, in @code{symbol_ref}
860 In a @code{symbol_ref}, indicates that @var{x} has been used.  This is
862 once.  Stored in the @code{used} field.
865 @cindex @code{symbol_ref} and @samp{/i}
866 @cindex @code{return_val}, in @code{symbol_ref}
868 In a @code{symbol_ref}, indicates that @var{x} has been declared weak.
869 Stored in the @code{return_val} field and printed as @samp{/i}.
872 @cindex @code{symbol_ref} and @samp{/v}
873 @cindex @code{volatil}, in @code{symbol_ref}
875 In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
876 Stored in the @code{volatil} field and printed as @samp{/v}.
878 Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
879 by @code{SYMBOL_REF_FLAGS}.  Certainly use of @code{SYMBOL_REF_FLAGS}
883 @cindex @code{prefetch} and @samp{/v}
884 @cindex @code{volatile}, in @code{prefetch}
886 In a @code{prefetch}, indicates that the prefetch is a scheduling barrier.
888 Stored in the @code{volatil} field and printed as @samp{/v}.
893 @table @code
897 In a @code{mem}, 1 means that the memory reference will not trap.
899 In a @code{call}, 1 means that this pure or const call may possibly
907 In an @code{insn} or @code{set} expression, 1 means that it is part of
912 In @code{reg} expressions, 1 means that the register holds a pointer.
914 In @code{mem} expressions, 1 means that the memory reference holds a pointer.
916 In @code{symbol_ref} expressions, 1 means that the reference addresses
924 In @code{reg} expressions, it is 1 if the register has its entire life
927 In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
930 In @code{label_ref} expressions, 1 means that the referenced label is
931 outside the innermost loop containing the insn in which the @code{label_ref}
934 In @code{code_label} expressions, it is 1 if the label may never be deleted.
936 label that would have been deleted is replaced with a @code{note} of type
937 @code{NOTE_INSN_DELETED_LABEL}.
939 In an @code{insn} during dead-code elimination, 1 means that the insn is
940 dead code.
942 In an @code{insn} or @code{jump_insn} during reorg for an insn in the
946 In an @code{insn} during instruction scheduling, 1 means that this insn
954 In @code{reg} expressions, 1 means the register contains
960 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
962 In @code{call} expressions, 1 means the call is pure.
969 In a @code{mem} expression, 1 means we should keep the alias set for this
972 In a @code{set}, 1 means it is for a return.
974 In a @code{call_insn}, 1 means it is a sibling call.
981 In @code{reg} and @code{mem} expressions, 1 means
984 In @code{subreg} expressions, it is 1 if the @code{subreg} references an
987 In an @code{insn} or @code{jump_insn} in the delay slot of a branch
990 In a @code{symbol_ref} expression, 1 means that this symbol addresses
993 In a @code{call_insn} 1 means that this instruction is a call to a const
1005 For a @code{reg}, it is used directly (without an access macro) by the
1006 leaf register renumbering code to ensure that each register is only
1009 In a @code{symbol_ref}, it indicates that an external declaration for
1016 In a @code{mem}, @code{asm_operands}, or @code{asm_input}
1021 In a @code{symbol_ref} expression, it is used for machine-specific
1024 In a @code{reg} expression, it is 1 if the value is a user-level variable.
1027 In an @code{insn}, 1 means the insn has been deleted.
1029 In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
1032 In @code{prefetch} expressions, 1 means that the containing insn is a
1044 for it.  In the C code, machine modes are represented by an enumeration
1045 type, @code{enum machine_mode}, defined in @file{machmode.def}.  Each RTL
1050 expression is written after the expression code with a colon to separate
1052 name are omitted.  For example, @code{(reg:SI 38)} is a @code{reg}
1053 expression with machine mode @code{SImode}.  If the mode is
1054 @code{VOIDmode}, it is not written at all.
1057 object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
1059 @table @code
1250 ``Condition Code'' mode represents the value of a condition code, which
1253 the condition code.  These modes are not used on machines that use
1254 @code{cc0} (@pxref{Condition Code}).
1261 which have no such instructions, @code{BLKmode} will not appear in RTL@.
1266 For example, RTL expressions of code @code{const_int} have mode
1267 @code{VOIDmode} because they can be taken to have whatever mode the context
1268 requires.  In debugging dumps of RTL, @code{VOIDmode} is expressed by
1279 point values.  The floating point values are in @code{QFmode},
1280 @code{HFmode}, @code{SFmode}, @code{DFmode}, @code{XFmode}, and
1281 @code{TFmode}, respectively.
1291 values.  The integer values are in @code{QImode}, @code{HImode},
1292 @code{SImode}, @code{DImode}, @code{TImode}, and @code{OImode},
1296 The machine description defines @code{Pmode} as a C macro which expands
1298 whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
1301 @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
1302 @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
1303 The compiler will attempt to use @code{DImode} for 8-byte structures and
1305 @code{MAX_FIXED_MODE_SIZE}.  Alternatively, you can have the compiler
1306 use @code{TImode} for 16-byte structures and unions.  Likewise, you can
1307 arrange for the C type @code{short int} to avoid using @code{HImode}.
1313 type @code{enum mode_class} defined in @file{machmode.h}.  The possible
1316 @table @code
1319 Integer modes.  By default these are @code{BImode}, @code{QImode},
1320 @code{HImode}, @code{SImode}, @code{DImode}, @code{TImode}, and
1321 @code{OImode}.
1325 The ``partial integer'' modes, @code{PQImode}, @code{PHImode},
1326 @code{PSImode} and @code{PDImode}.
1330 Floating point modes.  By default these are @code{QFmode},
1331 @code{HFmode}, @code{TQFmode}, @code{SFmode}, @code{DFmode},
1332 @code{XFmode} and @code{TFmode}.
1336 Decimal floating point modes.  By default these are @code{SDmode},
1337 @code{DDmode} and @code{TDmode}.
1341 Signed fractional modes.  By default these are @code{QQmode}, @code{HQmode},
1342 @code{SQmode}, @code{DQmode} and @code{TQmode}.
1346 Unsigned fractional modes.  By default these are @code{UQQmode}, @code{UHQmode},
1347 @code{USQmode}, @code{UDQmode} and @code{UTQmode}.
1351 Signed accumulator modes.  By default these are @code{HAmode},
1352 @code{SAmode}, @code{DAmode} and @code{TAmode}.
1356 Unsigned accumulator modes.  By default these are @code{UHAmode},
1357 @code{USAmode}, @code{UDAmode} and @code{UTAmode}.
1365 Complex floating point modes.  By default these are @code{QCmode},
1366 @code{HCmode}, @code{SCmode}, @code{DCmode}, @code{XCmode}, and
1367 @code{TCmode}.
1376 Modes representing condition code values.  These are @code{CCmode} plus
1377 any @code{CC_MODE} modes listed in the @file{@var{machine}-modes.def}.
1384 classes.  Currently @code{VOIDmode} and @code{BLKmode} are in
1385 @code{MODE_RANDOM}.
1390 @table @code
1416 @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1438 less than or equal to @code{HOST_BITS_PER_INT}.
1447 This is the same as @code{GET_MODE_SIZE} except in the case of complex
1454 @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
1463 The global variables @code{byte_mode} and @code{word_mode} contain modes
1464 whose classes are @code{MODE_INT} and whose bitsizes are either
1465 @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively.  On 32-bit
1466 machines, these are @code{QImode} and @code{SImode}, respectively.
1475 @table @code
1479 is customarily accessed with the macro @code{INTVAL} as in
1480 @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1482 Constants generated for modes with fewer bits than @code{HOST_WIDE_INT}
1483 must be sign extended to full width (e.g., with @code{gen_int_mode}).
1490 the value of the variable @code{const0_rtx}.  Likewise, the only
1491 expression for integer value one is found in @code{const1_rtx}, the only
1492 expression for integer value two is found in @code{const2_rtx}, and the
1494 @code{constm1_rtx}.  Any attempt to create an expression of code
1495 @code{const_int} and value zero, one, two or negative one will return
1496 @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
1497 @code{constm1_rtx} as appropriate.
1501 @code{STORE_FLAG_VALUE}.  It is found in @code{const_true_rtx}.  If
1502 @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
1503 @code{const1_rtx} will point to the same object.  If
1504 @code{STORE_FLAG_VALUE} is @minus{}1, @code{const_true_rtx} and
1505 @code{constm1_rtx} will point to the same object.
1510 integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1513 the latter case, @var{m} will be @code{VOIDmode}.
1516 If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1518 @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
1522 @code{REAL_VALUE_TYPE} (@pxref{Floating Point}).  The integers
1526 @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1531 The operand is a data structure of type @code{struct fixed_value} and
1532 is accessed with the macro @code{CONST_FIXED_VALUE}.  The high part of
1533 data is accessed with @code{CONST_FIXED_VALUE_HIGH}; the low part is
1534 accessed with @code{CONST_FIXED_VALUE_LOW}.
1540 the @code{const_int}, @code{const_double} or @code{const_fixed} elements.
1542 The number of units in a @code{const_vector} is obtained with the macro
1543 @code{CONST_VECTOR_NUNITS} as in @code{CONST_VECTOR_NUNITS (@var{v})}.
1546 @code{CONST_VECTOR_ELT} as in @code{CONST_VECTOR_ELT (@var{v}, @var{n})}
1564 The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
1569 Represents the value of an assembler label for code.  It contains one
1570 operand, an expression, which must be a @code{code_label} or a @code{note}
1571 of type @code{NOTE_INSN_DELETED_LABEL} that appears in the instruction
1574 The reason for using a distinct expression type for code label
1577 The @code{label_ref} contains a mode, which is usually @code{Pmode}.
1584 contains only constants (@code{const_int}, @code{symbol_ref} and
1585 @code{label_ref} expressions) combined with @code{plus} and
1586 @code{minus}.  However, not all combinations are valid, since the
1589 @var{m} should be @code{Pmode}.
1594 @code{symbol_ref}.  The number of bits is machine-dependent and is
1596 the high order bits of a register.  It is used with @code{lo_sum} to
1600 @var{m} should be @code{Pmode}.
1606 The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1608 @code{MODE_INT}, it returns @code{const0_rtx}.  If mode @var{mode} is of
1609 mode class @code{MODE_FLOAT}, it returns a @code{CONST_DOUBLE}
1611 @code{CONST_VECTOR} expression in mode @var{mode}.  Similarly, the macro
1612 @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
1613 mode @var{mode} and similarly for @code{CONST2_RTX}.  The
1614 @code{CONST1_RTX} and @code{CONST2_RTX} macros are undefined
1625 @table @code
1631 @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
1634 The compiler's strategy is to generate code assuming an unlimited
1648 The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
1659 an access to a pseudo register using a nonnatural mode, a @code{subreg}
1662 A @code{reg} expression with a machine mode that specifies more than
1668 Each pseudo register number used in a function's RTL code is
1669 represented by a unique @code{reg} expression.
1674 @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
1680 @table @code
1688 @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1689 @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1691 by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1692 value of @code{FIRST_PARM_OFFSET}.
1695 @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1697 If @code{FRAME_GROWS_DOWNWARD} is defined to a nonzero value, this points
1701 @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1702 @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1703 @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
1704 register given by @code{FRAME_POINTER_REGNUM} and the value
1705 @code{STARTING_FRAME_OFFSET}.
1713 @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1714 @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1716 @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1722 push insns should always use @code{STACK_POINTER_REGNUM}).
1724 @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1726 @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1732 @code{subreg} expressions are used to refer to a register in a machine
1734 a multi-part @code{reg} that actually refers to several registers.
1738 enclosed in a @code{subreg}.
1741 @code{subreg}:
1744 This is the most common case.  Most @code{subreg}s have pseudo
1745 @code{reg}s as their first operand.
1748 @code{subreg}s of @code{mem} were common in earlier versions of GCC and
1750 @code{mem}s.  On machines that do not do instruction scheduling, use of
1751 @code{subreg}s of @code{mem} are still used, but this is no longer
1752 recommended.  Such @code{subreg}s are considered to be
1753 @code{register_operand}s rather than @code{memory_operand}s before and
1755 schedule instructions with @code{subreg}s of @code{mem}, so for machines
1756 that do scheduling, @code{subreg}s of @code{mem} should never be used.
1757 To support this, the combine and recog passes have explicit code to
1758 inhibit the creation of @code{subreg}s of @code{mem} when
1759 @code{INSN_SCHEDULING} is defined.
1761 The use of @code{subreg}s of @code{mem} after the reload pass is an area
1763 code in the compiler to support this, but this code has possibly rotted.
1764 This use of @code{subreg}s is discouraged and will most likely not be
1768 It is seldom necessary to wrap hard registers in @code{subreg}s; such
1769 registers would normally reduce to a single @code{reg} rtx.  This use of
1770 @code{subreg}s is discouraged and may not be supported in the future.
1774 @code{subreg}s of @code{subreg}s are not supported.  Using
1775 @code{simplify_gen_subreg} is the recommended way to avoid this problem.
1777 @code{subreg}s come in two distinct flavors, each having its own
1782 When @var{m1} is strictly wider than @var{m2}, the @code{subreg}
1784 class of @code{subreg} is:
1790 Paradoxical @code{subreg}s can be used as both lvalues and rvalues.
1793 When used as an rvalue, the low-order bits of the @code{subreg} are
1800 @item @code{subreg}s of @code{mem}
1801 When @var{m2} is smaller than a word, the macro @code{LOAD_EXTEND_OP},
1804 @item @code{subreg} of @code{reg}s
1805 The upper bits are defined when @code{SUBREG_PROMOTED_VAR_P} is true.
1806 @code{SUBREG_PROMOTED_UNSIGNED_P} describes what the upper bits hold.
1812 @var{bytenum} is always zero for a paradoxical @code{subreg}, even on
1815 For example, the paradoxical @code{subreg}:
1829 two bytes to an unknown value assuming @code{SUBREG_PROMOTED_VAR_P} is
1833 When @var{m1} is at least as narrow as @var{m2} the @code{subreg}
1836 Normal @code{subreg}s restrict consideration to certain bits of
1838 the @code{subreg} refers to the least-significant part (or
1840 greater, the @code{subreg} refers to one or more complete words.
1842 When used as an lvalue, @code{subreg} is a word-based accessor.
1843 Storing to a @code{subreg} modifies all the words of @var{reg} that
1844 overlap the @code{subreg}, but it leaves the other words of @var{reg}
1847 When storing to a normal @code{subreg} that is smaller than a word,
1849 state.  This laxity makes it easier to generate efficient code for
1851 bits outside of those in the @code{subreg}, use @code{strict_low_part}
1852 or @code{zero_extract} around the @code{subreg}.
1855 @code{subreg} from the start of @var{reg}, assuming that @var{reg} is
1857 two target macros, @code{WORDS_BIG_ENDIAN} and @code{BYTES_BIG_ENDIAN}:
1861 @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1862 @code{WORDS_BIG_ENDIAN}, if set to 1, says that byte number zero is
1867 @cindex @code{BYTES_BIG_ENDIAN}, effect on @code{subreg}
1868 @code{BYTES_BIG_ENDIAN}, if set to 1, says that byte number zero is
1873 @cindex @code{FLOAT_WORDS_BIG_ENDIAN}, (lack of) effect on @code{subreg}
1874 On a few targets, @code{FLOAT_WORDS_BIG_ENDIAN} disagrees with
1875 @code{WORDS_BIG_ENDIAN}.  However, most parts of the compiler treat
1879 the runtime libraries care about @code{FLOAT_WORDS_BIG_ENDIAN}.
1887 on a @code{BYTES_BIG_ENDIAN}, @samp{UNITS_PER_WORD == 4} target is the same as
1894 @code{subreg}s access the lower two bytes of register @var{x}.
1898 A @code{MODE_PARTIAL_INT} mode behaves as if it were as wide as the
1899 corresponding @code{MODE_INT} mode, except that it has an unknown
1907 between the @code{PSImode} value and the @code{SImode} value is not
1909 two @code{subreg}s:
1917 @samp{(reg:DI 0)}.  Both @code{subreg}s have an unknown number
1920 If @samp{UNITS_PER_WORD <= 2} then these two @code{subreg}s:
1928 of @samp{(reg:PSI 0)}.  Storing to the first @code{subreg} does not
1939 @cindex @code{CANNOT_CHANGE_MODE_CLASS} and subreg semantics
1942 @var{m1}, @var{m2} and hard @var{reg}, the target-specific code
1953 The first operand of a @code{subreg} expression is customarily accessed
1954 with the @code{SUBREG_REG} macro and the second operand is customarily
1955 accessed with the @code{SUBREG_BYTE} macro.
1958 @code{BYTES_BIG_ENDIAN} not equal to @code{WORDS_BIG_ENDIAN} has
1960 may be confronted with code rot.
1967 converted into a @code{reg} by either the local register allocator or
1970 @code{scratch} is usually present inside a @code{clobber} operation
1974 @cindex condition code register
1976 This refers to the machine's condition code register.  It has no
1981 To stand for a complete set of condition code flags.  This is best on
1984 With this technique, @code{(cc0)} may be validly used in only two
1987 (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1994 With this technique, @code{(cc0)} may be validly used in only two
1997 first operand of @code{if_then_else} (in a conditional branch).
2001 There is only one expression object of code @code{cc0}; it is the
2002 value of the variable @code{cc0_rtx}.  Any attempt to create an
2003 expression of code @code{cc0} will return @code{cc0_rtx}.
2005 Instructions can set the condition code implicitly.  On many machines,
2006 nearly all instructions set the condition code based on the value that
2010 the macro @code{NOTICE_UPDATE_CC}).  @xref{Condition Code}.  Only
2011 instructions whose sole purpose is to set the condition code, and
2012 instructions that use the condition code, need mention @code{(cc0)}.
2014 On some machines, the condition code register is given a register number
2015 and a @code{reg} is used instead of @code{(cc0)}.  This is usually the
2017 condition code.  Other machines store condition codes in general
2022 condition code.  This is best handled by normally generating the
2023 instruction that does not set the condition code, and making a pattern
2024 that both performs the arithmetic and sets the condition code register
2025 (which would not be @code{(cc0)} in this case).  For examples, search
2032 may not have a machine mode.  @code{(pc)} may be validly used only in
2036 There is only one expression object of code @code{pc}; it is the value
2037 of the variable @code{pc_rtx}.  Any attempt to create an expression of
2038 code @code{pc} will return @code{pc_rtx}.
2051 The construct @code{(mem:BLK (scratch))} is considered to alias all
2065 single value.  Like @code{concat}, this should only appear in
2077 if it has mode @var{m}, or if it is a @code{const_int} or
2078 @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
2083 @table @code
2098 @code{plus} wraps round modulo the width of @var{m}; @code{ss_plus}
2100 @code{us_plus} saturates at the maximum unsigned value.
2108 of @var{y}.  It is used with @code{high} (@pxref{Constants}) to
2113 normally the number of bits in a @code{Pmode} item minus the number of
2114 bits set by @code{high}.
2116 @var{m} should be @code{Pmode}.
2131 the same as for the three variants of @code{plus} (see above).
2143 code.  And that is the @emph{only} way this kind of expression may
2145 @code{(cc0)} or a register.  @xref{Comparisons}.
2148 instead is the mode of the condition code value.  If @code{(cc0)} is
2149 used, it is @code{VOIDmode}.  Otherwise it is some mode in class
2150 @code{MODE_CC}, often @code{CCmode}.  @xref{Condition Code}.  If @var{m}
2151 is @code{VOIDmode} or @code{CCmode}, the operation returns sufficient
2153 can be applied to the result of the @code{COMPARE} operation.  For other
2154 modes in class @code{MODE_CC}, the operation only returns a subset of
2158 @code{compare} is valid only if the mode of @var{x} is in class
2159 @code{MODE_INT} and @var{y} is a @code{const_int} or
2160 @code{const_double} with mode @code{VOIDmode}.  The mode of @var{x}
2162 be @code{VOIDmode}.
2165 second operand and the comparison code adjusted as appropriate.
2167 A @code{compare} specifying two @code{VOIDmode} constants is not valid
2185 @code{neg}, the negation of the operand may be a number not representable
2186 in mode @var{m}, in which case it is truncated to @var{m}.  @code{ss_neg}
2187 and @code{us_neg} ensure that an out-of-bounds result saturates to the
2202 @code{ss_mult} and @code{us_mult} ensure that an out-of-bounds result
2216 @code{zero_extend} instead of @code{sign_extend}.
2220 Represents the @code{fma}, @code{fmaf}, and @code{fmal} builtin
2236 @code{ss_div} ensures that an out-of-bounds result saturates to the maximum
2241 such instructions using @code{truncate} and @code{sign_extend} as in,
2253 Like @code{div} but represents unsigned division.
2254 @code{us_div} ensures that an out-of-bounds result saturates to the maximum
2263 Like @code{div} and @code{udiv} but represent the remainder instead of
2272 Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
2275 operand is @code{NaN}, then it is unspecified which of the two operands
2283 Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
2330 modes.  An @code{ashift} operation is a plain shift with no special behavior
2331 in case of a change in the sign bit; @code{ss_ashift} and @code{us_ashift}
2336 be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
2339 of @var{c} is @code{QImode} regardless of @var{m}.
2346 Like @code{ashift} but for right shift.  Unlike the case for left shift,
2357 use @code{rotate}.
2365 @code{ss_abs} ensures that an out-of-bounds result saturates to the
2380 or @code{VOIDmode}.
2388 must be @var{m} or @code{VOIDmode}.
2395 @code{CLZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}).  Note that this is one of
2397 @var{x} must be @var{m} or @code{VOIDmode}.
2404 @code{CTZ_DEFINED_VALUE_AT_ZERO} (@pxref{Misc}).  Except for this case,
2405 @code{ctz(x)} is equivalent to @code{ffs(@var{x}) - 1}.  The mode of
2406 @var{x} must be @var{m} or @code{VOIDmode}.
2411 mode @var{m}.  The mode of @var{x} must be @var{m} or @code{VOIDmode}.
2417 @code{VOIDmode}.
2423 The mode of @var{x} must be @var{m} or @code{VOIDmode}.
2432 necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
2435 @code{FLOAT_STORE_FLAG_VALUE} (@pxref{Misc}) if the relation holds, or
2437 values, and a vector of either @code{VECTOR_STORE_FLAG_VALUE} (@pxref{Misc})
2442 (e.g., the first operand of an @code{if_then_else}), the mode must be
2443 @code{VOIDmode}.
2448 @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}.  Such
2451 condition code must be adjacent to the instruction using the condition
2452 code; only @code{note} insns may separate them.
2461 In the example above, if @code{(cc0)} were last set to
2462 @code{(compare @var{x} @var{y})}, the comparison operation is
2463 identical to @code{(eq @var{x} @var{y})}.  Usually only one style
2465 pass will try to merge the operations to produce the @code{eq} shown
2469 there are distinct expression codes @code{gt} and @code{gtu} for signed and
2473 @code{0xffffffff} which is greater than 1.
2478 @table @code
2482 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2488 @code{STORE_FLAG_VALUE} if the values represented by @var{x} and @var{y}
2494 @code{STORE_FLAG_VALUE} if the @var{x} is greater than @var{y}.  If they
2501 Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
2509 Like @code{gt} and @code{gtu} but test for ``less than''.
2517 Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
2525 Like @code{gt} and @code{gtu} but test for ``less than or equal''.
2535 On most machines, @code{if_then_else} expressions are valid only
2540 Similar to @code{if_then_else}, but more general.  Each of @var{test1},
2555 @table @code
2557 @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
2562 option @code{BITS_BIG_ENDIAN} says which end of the memory unit
2567 operand of the @code{insv} or @code{extv} pattern
2572 in the @code{insv} or @code{extv} pattern.
2577 A @code{sign_extract} can not appear as an lvalue, or part thereof,
2582 Like @code{sign_extract} but refers to an unsigned or zero-extended
2586 Unlike @code{sign_extract}, this type of expressions can be lvalues
2600 @table @code
2606 is a bit mask represented by a @code{const_int}; a zero bit indicates the
2613 the source vector, and @var{selection} is a @code{parallel} that contains a
2614 @code{const_int} for each of the subparts of the result vector, giving the
2643 @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
2654 to the desired final mode.  The conversion operation code says how
2657 For all conversion operations, @var{x} must not be @code{VOIDmode}
2662 @table @code
2727 be used validly in compiling C code only for integer-valued operands.
2776 @table @code
2778 @cindex @code{subreg}, in @code{strict_low_part}
2780 This expression code is used in only one context: as the destination operand of a
2781 @code{set} expression.  In addition, the operand of this expression
2782 must be a non-paradoxical @code{subreg} expression.
2784 The presence of @code{strict_low_part} says that the part of the
2804 @table @code
2809 representing a place that can be stored in: @code{reg} (or @code{subreg},
2810 @code{strict_low_part} or @code{zero_extract}), @code{mem}, @code{pc},
2811 @code{parallel}, or @code{cc0}.
2813 If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
2816 If @var{lval} is a @code{reg} whose machine mode is less than the full
2820 @var{lval} is a @code{subreg} whose machine mode is narrower than
2824 If @var{lval} is a @code{strict_low_part} of a subreg, then the part
2825 of the register specified by the machine mode of the @code{subreg} is
2828 If @var{lval} is a @code{zero_extract}, then the referenced part of
2830 @code{zero_extract} is given the value @var{x} and the rest of the
2831 bit-field is not changed.  Note that @code{sign_extract} can not
2834 If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
2835 be either a @code{compare} expression or a value that may have any mode.
2837 @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
2838 @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
2841 If @var{lval} is a @code{parallel}, it is used to represent the case of
2843 of the @code{parallel} is an @code{expr_list} whose first operand is a
2844 @code{reg} and whose second operand is a @code{const_int} representing the
2849 @cindex jump instructions and @code{set}
2850 @cindex @code{if_then_else} usage
2851 If @var{lval} is @code{(pc)}, we have a jump instruction, and the
2853 @code{label_ref} expression (unconditional jump).  It may be an
2854 @code{if_then_else} (conditional jump), in which case either the
2855 second or the third operand must be @code{(pc)} (for the case which
2856 does not jump) and the other of the two must be a @code{label_ref}
2857 (for the case which does jump).  @var{x} may also be a @code{mem} or
2858 @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
2859 @code{mem}; these unusual patterns are used to represent jumps through
2862 If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
2863 @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
2868 @var{lval} is customarily accessed with the @code{SET_DEST} macro and
2869 @var{x} with the @code{SET_SRC} macro.
2878 the @code{return} expression code is never used.
2880 Inside an @code{if_then_else} expression, represents the value to be
2881 placed in @code{pc} to return to the caller.
2883 Note that an insn pattern of @code{(return)} is logically equivalent to
2884 @code{(set (pc) (return))}, but the latter form is never used.
2888 Like @code{(return)}, but truly represents only a function return, while
2889 @code{(return)} may represent an insn that also performs other functions
2890 of the function epilogue.  Like @code{(return)}, this may also occur in
2895 Represents a function call.  @var{function} is a @code{mem} expression
2902 have.  The machine description defines macro @code{FUNCTION_MODE} to
2911 undescribed value into @var{x}, which must be a @code{reg},
2912 @code{scratch}, @code{parallel} or @code{mem} expression.
2920 If @var{x} is @code{(mem:BLK (const_int 0))} or
2921 @code{(mem:BLK (scratch))}, it means that all memory
2922 locations must be presumed clobbered.  If @var{x} is a @code{parallel},
2923 it has the same meaning as a @code{parallel} in a @code{set} expression.
2928 @code{clobber} expressions to indicate this fact.  Also, each function
2930 unless the function is declared @code{const}.
2932 If the last group of expressions in a @code{parallel} are each a
2933 @code{clobber} expression whose arguments are @code{reg} or
2934 @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
2935 phase can add the appropriate @code{clobber} expressions to an insn it
2944 When a @code{clobber} expression for a register appears inside a
2945 @code{parallel} with other side effects, the register allocator
2953 register, a pseudo register, or a @code{scratch} expression; in the
2958 @code{scratch} instead of a pseudo-register because this will allow the
2959 combiner phase to add the @code{clobber} when required.  You do this by
2960 coding (@code{clobber} (@code{match_scratch} @dots{})).  If you do
2965 @code{parallel}: when one of the input operands of the insn is also
2975 store a value in @var{x}.  @var{x} must be a @code{reg} expression.
2977 In some situations, it may be tempting to add a @code{use} of a
2978 register in a @code{parallel} to describe a situation where the value
2994 identical inputs to the @code{unspec}, they will be optimized away even
2997 This means that @code{use} can @emph{only} be used to describe
2999 @code{use} statements, more often you will want to use @code{unspec}
3000 instead.  The @code{use} RTX is most commonly useful to describe that
3006 During the reload phase, an insn that has a @code{use} as pattern
3007 can carry a reg_equal note.  These @code{use} insns will be deleted
3012 code and its data dependencies need to be taken into account.  These
3013 @code{use} insns will be deleted before the delayed branch scheduling
3019 brackets stand for a vector; the operand of @code{parallel} is a
3021 side effect expressions---expressions of code @code{set}, @code{call},
3022 @code{return}, @code{simple_return}, @code{clobber} or @code{use}.
3036 @code{(reg:SI 1)} appears as a memory address it refers to the value
3039 It follows that it is @emph{incorrect} to use @code{parallel} and
3040 expect the result of one @code{set} to be available for the next one.
3054 on the condition code value @emph{before} this instruction, not on the
3059 code output, can produce insns whose patterns consist of a @code{parallel}
3061 assembler code---often @code{reg}, @code{mem} or constant expressions.
3064 However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
3078 must be an @code{insn}, @code{jump_insn}, @code{call_insn},
3079 @code{code_label}, @code{barrier} or @code{note}.
3081 A @code{sequence} RTX is never placed in an actual insn during RTL
3083 @code{define_expand} @emph{before} those insns are passed to
3084 @code{emit_insn} to insert them in the chain of insns.  When actually
3086 @code{sequence} is forgotten.
3089 reside in its delay slots are grouped together into a @code{sequence}.
3093 @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
3096 @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
3106 @table @code
3109 Represents literal assembler code as described by the string @var{s}.
3117 @code{unspec_volatile} is used for volatile operations and operations
3118 that may trap; @code{unspec} is used for other operations.
3120 These codes may appear inside a @code{pattern} of an
3121 insn, inside a @code{parallel}, or inside an expression.
3126 etc., are @code{label_ref} expressions.  The mode @var{m} specifies
3128 @code{Pmode}.
3133 @var{base}.  The vector elements @var{lr0}, etc., are @code{label_ref}
3165 @table @code
3170 decremented.  @var{x} must be a @code{reg} or @code{mem}, but most
3171 machines allow only a @code{reg}.  @var{m} must be the machine mode
3182 This says to decrement pseudo register 39 by the length of a @code{DFmode}
3183 value and use the result to address a @code{DFmode} value.
3191 Represents the same side effect as @code{pre_dec} but a different
3204 @code{reg} or @code{mem}, but most machines allow only a @code{reg}.
3208 @code{(plus:@var{m} @var{x} @var{z})},
3209 @code{(minus:@var{m} @var{x} @var{z})}, or
3210 @code{(plus:@var{m} @var{x} @var{i})},
3243 could also be represented using @code{parallel} containing an additional
3244 @code{set} to describe how the address register is altered.  This is not
3254 @cindex @code{asm_operands}, usage
3255 The RTX code @code{asm_operands} represents a value produced by a
3257 an @code{asm} statement with arguments.  An @code{asm} statement with
3265 is represented using a single @code{asm_operands} RTX which represents
3266 the value that is stored in @code{outputvar}:
3277 Here the operands of the @code{asm_operands} RTX are the assembler
3281 mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
3282 @code{*z}.
3284 When an @code{asm} statement has multiple output values, its insn has
3285 several such @code{set} RTX's inside of a @code{parallel}.  Each @code{set}
3286 contains an @code{asm_operands}; all of these share the same assembler
3295 Variable tracking relies on @code{MEM_EXPR} and @code{REG_EXPR}
3304 @table @code
3307 Binds variable @code{var}, a tree, to value @var{exp}, an RTL
3308 expression.  It appears only in @code{NOTE_INSN_VAR_LOCATION} and
3309 @code{DEBUG_INSN}s, with slightly different meanings.  @var{mode}, if
3317 Stands for the value bound to the @code{DEBUG_EXPR_DECL} @var{decl},
3319 @code{VAR_LOCATION} nodes.
3327 The RTL representation of the code for a function is a doubly-linked
3330 actual instructions; others represent dispatch tables for @code{switch}
3339 @code{sequence}), and chain pointers to the preceding and following
3341 independent of the expression code of the insn.  They could be accessed
3342 with @code{XEXP} and @code{XINT}, but instead three special macros are
3345 @table @code
3363 The first insn in the chain is obtained by calling @code{get_insns}; the
3364 last insn is the result of calling @code{get_last_insn}.  Within the
3365 chain delimited by these insns, the @code{NEXT_INSN} and
3366 @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
3384 @code{sequence} expressions, which contain a vector of insns.  The value
3385 of @code{NEXT_INSN} in all but the last of these insns is the next insn
3386 in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
3387 is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
3388 which it is contained.  Similar rules apply for @code{PREV_INSN}.
3391 inside @code{sequence} expressions.  Specifically, if @var{insn} is the
3392 first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
3393 is the insn containing the @code{sequence} expression, as is the value
3394 of @code{PREV_INSN (NEXT_INSN (@var{insn}))} if @var{insn} is the last
3395 insn in the @code{sequence} expression.  You can use these expressions
3396 to find the containing @code{sequence} expression.
3400 @table @code
3403 The expression code @code{insn} is used for instructions that do not jump
3404 and do not do function calls.  @code{sequence} expressions are always
3405 contained in insns with code @code{insn} even if one of those insns
3408 Insns with code @code{insn} have four additional fields beyond the three
3413 The expression code @code{jump_insn} is used for instructions that may
3414 jump (or, more generally, may contain @code{label_ref} expressions to
3415 which @code{pc} can be set in that instruction).  If there is an
3417 @code{jump_insn}.
3420 @code{jump_insn} insns have the same extra fields as @code{insn} insns,
3422 @code{JUMP_LABEL} which is defined once jump optimization has completed.
3425 the @code{code_label} to which this insn will (possibly conditionally)
3426 branch.  In a more complex jump, @code{JUMP_LABEL} records one of the
3428 as @code{REG_LABEL_TARGET} notes.  The exception is @code{addr_vec}
3429 and @code{addr_diff_vec}, where @code{JUMP_LABEL} is @code{NULL_RTX}
3434 labels, their @code{JUMP_LABEL} is @code{NULL_RTX}.
3438 The expression code @code{call_insn} is used for instructions that may do
3444 @code{call_insn} insns have the same extra fields as @code{insn} insns,
3446 @code{CALL_INSN_FUNCTION_USAGE}, which contains a list (chain of
3447 @code{expr_list} expressions) containing @code{use} and @code{clobber}
3448 expressions that denote hard registers and @code{MEM}s used or
3451 A @code{MEM} generally points to a stack slots in which arguments passed
3455 the stack slot will be mentioned in @code{CLOBBER} and @code{USE}
3456 entries; if it's callee-copied, only a @code{USE} will appear, and the
3457 @code{MEM} may point to addresses that are not stack slots.
3459 @code{CLOBBER}ed registers in this list augment registers specified in
3460 @code{CALL_USED_REGISTERS} (@pxref{Register Basics}).
3465 A @code{code_label} insn represents a label that a jump insn can jump
3467 standard ones.  @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
3474 When a @code{code_label} appears in an RTL expression, it normally
3475 appears within a @code{label_ref} which represents the address of
3478 Besides as a @code{code_label}, a label can also be represented as a
3479 @code{note} of type @code{NOTE_INSN_DELETED_LABEL}.
3482 The field @code{LABEL_NUSES} is only defined once the jump optimization
3490 The field @code{LABEL_KIND} differentiates four different types of
3491 labels: @code{LABEL_NORMAL}, @code{LABEL_STATIC_ENTRY},
3492 @code{LABEL_GLOBAL_ENTRY}, and @code{LABEL_WEAK_ENTRY}.  The only labels
3493 that do not have type @code{LABEL_NORMAL} are @dfn{alternate entry
3501 for this purpose, the macro @code{LABEL_ALT_ENTRY_P} is provided.  It is
3504 and weak alternate entry points, besides the front-end code that creates
3505 them, is the function @code{output_alternate_entry_point}, in
3508 To set the kind of a label, use the @code{SET_LABEL_KIND} macro.
3515 @code{volatile} functions, which do not return (e.g., @code{exit}).
3522 @code{note} insns are used to represent additional debugging and
3524 integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
3525 string accessed with @code{NOTE_SOURCE_FILE}.
3527 If @code{NOTE_LINE_NUMBER} is positive, the note represents the
3528 position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
3532 Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
3533 code with one of the following values (and @code{NOTE_SOURCE_FILE}
3536 @table @code
3544 This marks what used to be a @code{code_label}, but was not used for other
3546 code jumps to it.
3561 level of scoping for exception handling.  @code{NOTE_BLOCK_NUMBER}
3562 identifies which @code{CODE_LABEL} or @code{note} of type
3563 @code{NOTE_INSN_DELETED_LABEL} is associated with the given region.
3570 of a @code{while} or @code{for} loop.  They enable the loop optimizer
3575 Appears at the place in a loop that @code{continue} statements jump to.
3593 It indicates that the user variable in its @code{VAR_LOCATION} operand
3606 The expression code @code{debug_insn} is used for pseudo-instructions
3609 representation of @code{GIMPLE_DEBUG} statements
3610 (@ref{@code{GIMPLE_DEBUG}}), with a @code{VAR_LOCATION} operand that
3612 @code{value} in the corresponding statement.  A @code{DEBUG_EXPR} in
3614 @code{DEBUG_EXPR_DECL}.
3626 Unlike @code{NOTE_INSN_VAR_LOCATION}, the value expression in an
3627 @code{INSN_VAR_LOCATION} denotes a value at that specific point in the
3629 point before an overriding @code{VAR_LOCATION} is encountered.  E.g.,
3630 if a user variable is bound to a @code{REG} and then a subsequent insn
3631 modifies the @code{REG}, the note location would keep mapping the user
3639 @cindex @code{TImode}, in @code{insn}
3640 @cindex @code{HImode}, in @code{insn}
3641 @cindex @code{QImode}, in @code{insn}
3642 The machine mode of an insn is normally @code{VOIDmode}, but some
3646 @code{QImode} when it is the first insn in a block that has already
3650 sets the mode of an insn to @code{TImode} when it is believed that the
3655 Here is a table of the extra fields of @code{insn}, @code{jump_insn}
3656 and @code{call_insn} insns:
3658 @table @code
3662 be one of the following codes: @code{set}, @code{call}, @code{use},
3663 @code{clobber}, @code{return}, @code{simple_return}, @code{asm_input},
3664 @code{asm_output}, @code{addr_vec}, @code{addr_diff_vec},
3665 @code{trap_if}, @code{unspec}, @code{unspec_volatile},
3666 @code{parallel}, @code{cond_exec}, or @code{sequence}.  If it is a
3667 @code{parallel}, each element of the @code{parallel} must be one these
3668 codes, except that @code{parallel} expressions cannot be nested and
3669 @code{addr_vec} and @code{addr_diff_vec} are not permitted inside a
3670 @code{parallel} expression.
3678 whose pattern consists of a single @code{use}, @code{clobber},
3679 @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
3682 Matching is also never attempted on insns that result from an @code{asm}
3683 statement.  These contain at least one @code{asm_operands} expression.
3684 The function @code{asm_noperands} returns a non-negative value for
3693 A list (chain of @code{insn_list} expressions) giving information about
3701 A list (chain of @code{expr_list} and @code{insn_list} expressions)
3706 The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
3708 and the second is another @code{insn_list} expression (the next one in
3709 the chain).  The last @code{insn_list} in the chain has a null pointer
3711 insns appear in it (as first operands of @code{insn_list}
3720 The @code{REG_NOTES} field of an insn is a chain similar to the
3721 @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
3722 addition to @code{insn_list} expressions.  There are several kinds of
3724 register note is really understood as being an @code{enum reg_note}.
3730 The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
3731 register note.  Its counterpart, the macro @code{PUT_REG_NOTE_KIND
3738 of values that are only used in @code{LOG_LINKS}.
3742 @table @code
3756 subsequent insn.  This differs from a @code{REG_DEAD} note, which
3765 This means it appears in a @code{post_inc}, @code{pre_inc},
3766 @code{post_dec} or @code{pre_dec} expression.
3774 The @code{REG_NONNEG} note is added to insns only if the machine
3779 This insn uses @var{op}, a @code{code_label} or a @code{note} of type
3780 @code{NOTE_INSN_DELETED_LABEL}, but is not a @code{jump_insn}, or it
3781 is a @code{jump_insn} that refers to the operand as an ordinary
3789 This insn is a @code{jump_insn} but not an @code{addr_vec} or
3790 @code{addr_diff_vec}.  It uses @var{op}, a @code{code_label} as a
3792 @code{REG_LABEL_OPERAND}.  This note is only present if the insn has
3794 insn-field) goes into the @code{JUMP_LABEL} field and does not have a
3795 @code{REG_LABEL_TARGET} note.  @xref{Insns, JUMP_LABEL}.
3809 Appears attached to each @code{CALL_INSN} to @code{setjmp} or a
3815 @table @code
3825 output of the single @code{set} is a @code{strict_low_part} expression,
3826 the note refers to the register that is contained in @code{SUBREG_REG}
3827 of the @code{subreg} expression.
3829 For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
3842 A @code{REG_EQUIV} note is also used on an instruction which copies a
3851 @code{REG_PARM_STACK_SPACE} in @ref{Stack Arguments}.
3853 In the case of @code{REG_EQUAL}, the register that is set by this insn
3862 @code{REG_EQUAL} is used by passes prior to register allocation (such as
3864 to think of that value.  @code{REG_EQUIV} notes are used by register
3866 (either a constant or a @code{mem} expression for the location of a
3871 @code{REG_EQUIV} note and are not useful to the early optimization
3875 @code{REG_EQUAL} note.  In the early stages of register allocation, a
3876 @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
3881 @code{REG_EQUAL} notes and passes subsequent to register allocation
3882 need only check for @code{REG_EQUIV} notes.
3889 @table @code
3894 On machines that use @code{cc0}, the insns which set and use @code{cc0}
3895 set and use @code{cc0} are adjacent.  However, when branch delay slot
3897 @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
3898 point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
3899 be placed on the insn using @code{cc0} to point to the insn setting
3900 @code{cc0}.
3903 These values are only used in the @code{LOG_LINKS} field, and indicate
3905 a data dependence (a read after write dependence) do not use any code,
3906 they simply have mode @code{VOIDmode}, and are printed without any
3909 @table @code
3925 are stored in the @code{REG_NOTES} field of an insn as an
3926 @code{expr_list}.
3928 @table @code
3949 For convenience, the machine mode in an @code{insn_list} or
3950 @code{expr_list} is printed using these symbolic codes in debugging dumps.
3954 The only difference between the expression codes @code{insn_list} and
3955 @code{expr_list} is that the first operand of an @code{insn_list} is
3957 unique id; the first operand of an @code{expr_list} is printed in the
3966 Insns that call subroutines have the RTL expression code @code{call_insn}.
3968 RTL expression code, @code{call}.
3970 @cindex @code{call} usage
3971 A @code{call} expression has two operands, as follows:
3980 (which must equal as the definition of the @code{FUNCTION_MODE} macro in
3984 For a subroutine that returns no value, the @code{call} expression as
3986 also contain @code{use} or @code{clobber} expressions.
3988 @cindex @code{BLKmode}, and function return values
3989 For a subroutine that returns a value whose mode is not @code{BLKmode},
4002 When a subroutine returns a @code{BLKmode} value, it is handled by
4008 for example to contain the return address.  @code{call_insn} insns
4009 on these machines should have a body which is a @code{parallel}
4010 that contains both the @code{call} expression and @code{clobber}
4013 pointer that is not explicitly mentioned in its RTL, a @code{use}
4017 the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
4018 Basics}) and, with the exception of @code{const} functions and library
4021 Insns containing just @code{use} expressions directly precede the
4022 @code{call_insn} insn to indicate which registers contain inputs to the
4024 @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
4025 containing a single @code{clobber} follow immediately after the call to
4045 @cindex @code{reg}, RTL sharing
4047 Each pseudo-register has only a single @code{reg} object to represent it,
4051 @cindex @code{symbol_ref}, RTL sharing
4053 For any symbolic label, there is only one @code{symbol_ref} object
4056 @cindex @code{const_int}, RTL sharing
4058 All @code{const_int} expressions with equal values are shared.
4060 @cindex @code{pc}, RTL sharing
4062 There is only one @code{pc} expression.
4064 @cindex @code{cc0}, RTL sharing
4066 There is only one @code{cc0} expression.
4068 @cindex @code{const_double}, RTL sharing
4070 There is only one @code{const_double} expression with value 0 for
4073 @cindex @code{const_vector}, RTL sharing
4075 There is only one @code{const_vector} expression with value 0 for
4078 @cindex @code{label_ref}, RTL sharing
4079 @cindex @code{scratch}, RTL sharing
4081 No @code{label_ref} or @code{scratch} appears in more than one place in
4083 the insns in the function and assume that each time a @code{label_ref}
4084 or @code{scratch} is seen it is distinct from all others that are seen.
4086 @cindex @code{mem}, RTL sharing
4088 Only one @code{mem} object is normally created for each static
4093 @cindex @code{asm_operands}, RTL sharing
4095 When a single @code{asm} statement has multiple output operands, a
4096 distinct @code{asm_operands} expression is made for each output operand.
4099 @code{asm_operands} expressions come from the same statement, so all
4113 structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
4121 @code{copy_rtx_if_shared}, which is a subroutine of
4122 @code{unshare_all_rtl}.
4128 To read an RTL object from a file, call @code{read_rtx}.  It takes one