Lines Matching refs:misaligned_size

1022     u32 misaligned_size)  in vxge_hal_fifo_txdl_buffer_set_aligned()  argument
1034 	    (size != 0) && (misaligned_size != 0));  in vxge_hal_fifo_txdl_buffer_set_aligned()
1047 	    misaligned_size);  in vxge_hal_fifo_txdl_buffer_set_aligned()
1064 	vxge_assert(misaligned_size != 0 &&  in vxge_hal_fifo_txdl_buffer_set_aligned()
1065 	    misaligned_size <= fifo->config->alignment_size);  in vxge_hal_fifo_txdl_buffer_set_aligned()
1067 	remaining_size = size - misaligned_size;  in vxge_hal_fifo_txdl_buffer_set_aligned()
1071 	    vaddr, misaligned_size);  in vxge_hal_fifo_txdl_buffer_set_aligned()
1081 	txdp->control_0 |= VXGE_HAL_FIFO_TXD_BUFFER_SIZE(misaligned_size);  in vxge_hal_fifo_txdl_buffer_set_aligned()
1082 	txdl_priv->bytes_sent += misaligned_size;  in vxge_hal_fifo_txdl_buffer_set_aligned()
1095 	    misaligned_size,  in vxge_hal_fifo_txdl_buffer_set_aligned()
1102 		txdp->buffer_pointer = (u64) dma_pointer + misaligned_size;  in vxge_hal_fifo_txdl_buffer_set_aligned()