276 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, RCR_SOFTRESET);  in sninit_locked()
278 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, 0x0000);  in sninit_locked()
282 	CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, 0x0000);  in sninit_locked()
290 	CSR_WRITE_2(sc, CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |  in sninit_locked()
296 	CSR_WRITE_2(sc, CONFIG_REG_W, flags);  in sninit_locked()
302 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_RESET);  in sninit_locked()
325 	CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, flags);  in sninit_locked()
442 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_ALLOC | numPages);  in snstart_locked()
492 	CSR_WRITE_2(sc, POINTER_REG_W, PTR_AUTOINC | 0x0000);  in snstart_locked()
498 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snstart_locked()
531 		CSR_WRITE_2(sc, DATA_REG_W, 0);  in snstart_locked()
542 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snstart_locked()
552 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_ENQUEUE);  in snstart_locked()
684 		CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_FREEPKT);  in snresume()
691 	CSR_WRITE_2(sc, POINTER_REG_W, PTR_AUTOINC | 0x0000);  in snresume()
697 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snresume()
729 		CSR_WRITE_2(sc, DATA_REG_W, 0);  in snresume()
740 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snresume()
749 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_ENQUEUE);  in snresume()
886 		CSR_WRITE_2(sc, POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);  in snintr_locked()
912 		CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, TCR_ENABLE);  in snintr_locked()
914 		CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);  in snintr_locked()
923 		CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_FREEPKT);  in snintr_locked()
1026 	CSR_WRITE_2(sc, POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);  in snread()
1114 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_RELEASE);  in snread()
1200 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, 0x0000);  in snstop()
1201 	CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, 0x0000);  in snstop()
1303 	CSR_WRITE_2(sc, BANK_SELECT_REG_W, 0x0000);  in sn_probe()
1318 	CSR_WRITE_2(sc, BANK_SELECT_REG_W, 0x0001);  in sn_probe()
1340 	CSR_WRITE_2(sc, BANK_SELECT_REG_W, 0x3);  in sn_probe()
1391 			CSR_WRITE_2(sc, MULTICAST1_REG_W,  in sn_setmcast()
1393 			CSR_WRITE_2(sc, MULTICAST2_REG_W,  in sn_setmcast()
1395 			CSR_WRITE_2(sc, MULTICAST3_REG_W,  in sn_setmcast()
1397 			CSR_WRITE_2(sc, MULTICAST4_REG_W,  in sn_setmcast()
1404 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, flags);  in sn_setmcast()