4307 #define	MSK_READ_MIB32(x, y)					\  macro
4311 	(((uint64_t)MSK_READ_MIB32(x, (y) + 8)) << 32) +	\
4312 	(uint64_t)MSK_READ_MIB32(x, y)
4330 		reg = MSK_READ_MIB32(sc_if->msk_port, i);  in msk_stats_clear()
4358 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_UC_OK);  in msk_stats_update()
4360 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_BC_OK);  in msk_stats_update()
4362 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_MPAUSE);  in msk_stats_update()
4364 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_MC_OK);  in msk_stats_update()
4366 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_FCS_ERR);  in msk_stats_update()
4367 	reg = MSK_READ_MIB32(sc_if->msk_port, GM_RXF_SPARE1);  in msk_stats_update()
4373 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_SHT);  in msk_stats_update()
4375 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXE_FRAG);  in msk_stats_update()
4377 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_64B);  in msk_stats_update()
4379 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_127B);  in msk_stats_update()
4381 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_255B);  in msk_stats_update()
4383 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_511B);  in msk_stats_update()
4385 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_1023B);  in msk_stats_update()
4387 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_1518B);  in msk_stats_update()
4389 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_MAX_SZ);  in msk_stats_update()
4391 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_LNG_ERR);  in msk_stats_update()
4393 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXF_JAB_PKT);  in msk_stats_update()
4394 	reg = MSK_READ_MIB32(sc_if->msk_port, GM_RXF_SPARE2);  in msk_stats_update()
4396 	    MSK_READ_MIB32(sc_if->msk_port, GM_RXE_FIFO_OV);  in msk_stats_update()
4397 	reg = MSK_READ_MIB32(sc_if->msk_port, GM_RXF_SPARE3);  in msk_stats_update()
4401 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_UC_OK);  in msk_stats_update()
4403 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_BC_OK);  in msk_stats_update()
4405 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_MPAUSE);  in msk_stats_update()
4407 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_MC_OK);  in msk_stats_update()
4411 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_64B);  in msk_stats_update()
4413 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_127B);  in msk_stats_update()
4415 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_255B);  in msk_stats_update()
4417 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_511B);  in msk_stats_update()
4419 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_1023B);  in msk_stats_update()
4421 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_1518B);  in msk_stats_update()
4423 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_MAX_SZ);  in msk_stats_update()
4424 	reg = MSK_READ_MIB32(sc_if->msk_port, GM_TXF_SPARE1);  in msk_stats_update()
4426 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_COL);  in msk_stats_update()
4428 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_LAT_COL);  in msk_stats_update()
4430 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_ABO_COL);  in msk_stats_update()
4432 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_MUL_COL);  in msk_stats_update()
4434 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXF_SNG_COL);  in msk_stats_update()
4436 	    MSK_READ_MIB32(sc_if->msk_port, GM_TXE_FIFO_UR);  in msk_stats_update()
4456 	result = MSK_READ_MIB32(sc_if->msk_port, GM_MIB_CNT_BASE + off * 2);  in msk_sysctl_stat32()
4484 #undef MSK_READ_MIB32