Lines Matching refs:ops
198 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
203 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
225 hw->phy.ops.release(hw); in e1000_phy_is_accessible_pchlan()
229 hw->phy.ops.acquire(hw); in e1000_phy_is_accessible_pchlan()
237 hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
239 hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
319 ret_val = hw->phy.ops.acquire(hw); in e1000_init_phy_workarounds_pchlan()
358 if (hw->phy.ops.check_reset_block(hw)) { in e1000_init_phy_workarounds_pchlan()
387 hw->phy.ops.release(hw); in e1000_init_phy_workarounds_pchlan()
391 if (hw->phy.ops.check_reset_block(hw)) { in e1000_init_phy_workarounds_pchlan()
411 ret_val = hw->phy.ops.check_reset_block(hw); in e1000_init_phy_workarounds_pchlan()
443 phy->ops.acquire = e1000_acquire_swflag_ich8lan; in e1000_init_phy_params_pchlan()
444 phy->ops.check_reset_block = e1000_check_reset_block_ich8lan; in e1000_init_phy_params_pchlan()
445 phy->ops.get_cfg_done = e1000_get_cfg_done_ich8lan; in e1000_init_phy_params_pchlan()
446 phy->ops.set_page = e1000_set_page_igp; in e1000_init_phy_params_pchlan()
447 phy->ops.read_reg = e1000_read_phy_reg_hv; in e1000_init_phy_params_pchlan()
448 phy->ops.read_reg_locked = e1000_read_phy_reg_hv_locked; in e1000_init_phy_params_pchlan()
449 phy->ops.read_reg_page = e1000_read_phy_reg_page_hv; in e1000_init_phy_params_pchlan()
450 phy->ops.release = e1000_release_swflag_ich8lan; in e1000_init_phy_params_pchlan()
451 phy->ops.reset = e1000_phy_hw_reset_ich8lan; in e1000_init_phy_params_pchlan()
452 phy->ops.set_d0_lplu_state = e1000_set_lplu_state_pchlan; in e1000_init_phy_params_pchlan()
453 phy->ops.set_d3_lplu_state = e1000_set_lplu_state_pchlan; in e1000_init_phy_params_pchlan()
454 phy->ops.write_reg = e1000_write_phy_reg_hv; in e1000_init_phy_params_pchlan()
455 phy->ops.write_reg_locked = e1000_write_phy_reg_hv_locked; in e1000_init_phy_params_pchlan()
456 phy->ops.write_reg_page = e1000_write_phy_reg_page_hv; in e1000_init_phy_params_pchlan()
457 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_pchlan()
458 phy->ops.power_down = e1000_power_down_phy_copper_ich8lan; in e1000_init_phy_params_pchlan()
495 phy->ops.check_polarity = e1000_check_polarity_82577; in e1000_init_phy_params_pchlan()
496 phy->ops.force_speed_duplex = in e1000_init_phy_params_pchlan()
498 phy->ops.get_cable_length = e1000_get_cable_length_82577; in e1000_init_phy_params_pchlan()
499 phy->ops.get_info = e1000_get_phy_info_82577; in e1000_init_phy_params_pchlan()
500 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_pchlan()
503 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_pchlan()
504 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_pchlan()
505 phy->ops.get_cable_length = e1000_get_cable_length_m88; in e1000_init_phy_params_pchlan()
506 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_pchlan()
533 phy->ops.acquire = e1000_acquire_swflag_ich8lan; in e1000_init_phy_params_ich8lan()
534 phy->ops.check_reset_block = e1000_check_reset_block_ich8lan; in e1000_init_phy_params_ich8lan()
535 phy->ops.get_cable_length = e1000_get_cable_length_igp_2; in e1000_init_phy_params_ich8lan()
536 phy->ops.get_cfg_done = e1000_get_cfg_done_ich8lan; in e1000_init_phy_params_ich8lan()
537 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_ich8lan()
538 phy->ops.release = e1000_release_swflag_ich8lan; in e1000_init_phy_params_ich8lan()
539 phy->ops.reset = e1000_phy_hw_reset_ich8lan; in e1000_init_phy_params_ich8lan()
540 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_ich8lan; in e1000_init_phy_params_ich8lan()
541 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_ich8lan; in e1000_init_phy_params_ich8lan()
542 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_ich8lan()
543 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_ich8lan()
544 phy->ops.power_down = e1000_power_down_phy_copper_ich8lan; in e1000_init_phy_params_ich8lan()
551 phy->ops.write_reg = e1000_write_phy_reg_bm; in e1000_init_phy_params_ich8lan()
552 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
574 phy->ops.read_reg_locked = e1000_read_phy_reg_igp_locked; in e1000_init_phy_params_ich8lan()
575 phy->ops.write_reg_locked = e1000_write_phy_reg_igp_locked; in e1000_init_phy_params_ich8lan()
576 phy->ops.get_info = e1000_get_phy_info_igp; in e1000_init_phy_params_ich8lan()
577 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_ich8lan()
578 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_ich8lan()
585 phy->ops.get_info = e1000_get_phy_info_ife; in e1000_init_phy_params_ich8lan()
586 phy->ops.check_polarity = e1000_check_polarity_ife; in e1000_init_phy_params_ich8lan()
587 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_ife; in e1000_init_phy_params_ich8lan()
592 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
593 phy->ops.write_reg = e1000_write_phy_reg_bm; in e1000_init_phy_params_ich8lan()
594 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_ich8lan()
595 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_ich8lan()
596 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_ich8lan()
597 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_ich8lan()
663 nvm->ops.acquire = e1000_acquire_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
664 nvm->ops.release = e1000_release_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
665 nvm->ops.read = e1000_read_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
666 nvm->ops.update = e1000_update_nvm_checksum_ich8lan; in e1000_init_nvm_params_ich8lan()
667 nvm->ops.valid_led_default = e1000_valid_led_default_ich8lan; in e1000_init_nvm_params_ich8lan()
668 nvm->ops.validate = e1000_validate_nvm_checksum_ich8lan; in e1000_init_nvm_params_ich8lan()
669 nvm->ops.write = e1000_write_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
711 mac->ops.get_bus_info = e1000_get_bus_info_ich8lan; in e1000_init_mac_params_ich8lan()
713 mac->ops.set_lan_id = e1000_set_lan_id_single_port; in e1000_init_mac_params_ich8lan()
715 mac->ops.reset_hw = e1000_reset_hw_ich8lan; in e1000_init_mac_params_ich8lan()
717 mac->ops.init_hw = e1000_init_hw_ich8lan; in e1000_init_mac_params_ich8lan()
719 mac->ops.setup_link = e1000_setup_link_ich8lan; in e1000_init_mac_params_ich8lan()
721 mac->ops.setup_physical_interface = e1000_setup_copper_link_ich8lan; in e1000_init_mac_params_ich8lan()
723 mac->ops.check_for_link = e1000_check_for_copper_link_ich8lan; in e1000_init_mac_params_ich8lan()
725 mac->ops.get_link_up_info = e1000_get_link_up_info_ich8lan; in e1000_init_mac_params_ich8lan()
727 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; in e1000_init_mac_params_ich8lan()
729 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan; in e1000_init_mac_params_ich8lan()
737 mac->ops.check_mng_mode = e1000_check_mng_mode_ich8lan; in e1000_init_mac_params_ich8lan()
739 mac->ops.id_led_init = e1000_id_led_init_generic; in e1000_init_mac_params_ich8lan()
741 mac->ops.blink_led = e1000_blink_led_generic; in e1000_init_mac_params_ich8lan()
743 mac->ops.setup_led = e1000_setup_led_generic; in e1000_init_mac_params_ich8lan()
745 mac->ops.cleanup_led = e1000_cleanup_led_ich8lan; in e1000_init_mac_params_ich8lan()
747 mac->ops.led_on = e1000_led_on_ich8lan; in e1000_init_mac_params_ich8lan()
748 mac->ops.led_off = e1000_led_off_ich8lan; in e1000_init_mac_params_ich8lan()
752 mac->ops.rar_set = e1000_rar_set_pch2lan; in e1000_init_mac_params_ich8lan()
756 mac->ops.update_mc_addr_list = in e1000_init_mac_params_ich8lan()
765 mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan; in e1000_init_mac_params_ich8lan()
767 mac->ops.id_led_init = e1000_id_led_init_pchlan; in e1000_init_mac_params_ich8lan()
769 mac->ops.setup_led = e1000_setup_led_pchlan; in e1000_init_mac_params_ich8lan()
771 mac->ops.cleanup_led = e1000_cleanup_led_pchlan; in e1000_init_mac_params_ich8lan()
773 mac->ops.led_on = e1000_led_on_pchlan; in e1000_init_mac_params_ich8lan()
774 mac->ops.led_off = e1000_led_off_pchlan; in e1000_init_mac_params_ich8lan()
782 mac->ops.rar_set = e1000_rar_set_pch_lpt; in e1000_init_mac_params_ich8lan()
783 mac->ops.setup_physical_interface = e1000_setup_copper_link_pch_lpt; in e1000_init_mac_params_ich8lan()
784 mac->ops.set_obff_timer = e1000_set_obff_timer_pch_lpt; in e1000_init_mac_params_ich8lan()
810 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR, address); in __e1000_access_emi_reg_locked()
815 ret_val = hw->phy.ops.read_reg_locked(hw, I82579_EMI_DATA, in __e1000_access_emi_reg_locked()
818 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA, in __e1000_access_emi_reg_locked()
891 ret_val = hw->phy.ops.acquire(hw); in e1000_set_eee_pchlan()
895 ret_val = hw->phy.ops.read_reg_locked(hw, I82579_LPI_CTRL, &lpi_ctrl); in e1000_set_eee_pchlan()
922 hw->phy.ops.read_reg_locked(hw, PHY_LP_ABILITY, &data); in e1000_set_eee_pchlan()
951 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_LPI_CTRL, lpi_ctrl); in e1000_set_eee_pchlan()
953 hw->phy.ops.release(hw); in e1000_set_eee_pchlan()
977 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_workaround_lpt_lp()
1005 hw->phy.ops.release(hw); in e1000_k1_workaround_lpt_lp()
1014 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, ®); in e1000_k1_workaround_lpt_lp()
1036 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg); in e1000_k1_workaround_lpt_lp()
1099 hw->mac.ops.get_link_up_info(hw, &speed, &duplex); in e1000_platform_pm_pch_lpt()
1263 ret_val = hw->phy.ops.acquire(hw); in e1000_enable_ulp_lpt_lp()
1306 hw->phy.ops.release(hw); in e1000_enable_ulp_lpt_lp()
1381 ret_val = hw->phy.ops.acquire(hw); in e1000_disable_ulp_lpt_lp()
1445 hw->phy.ops.release(hw); in e1000_disable_ulp_lpt_lp()
1447 hw->phy.ops.reset(hw); in e1000_disable_ulp_lpt_lp()
1515 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1525 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1577 hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1584 hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
1612 mac->ops.config_collision_dist(hw); in e1000_check_for_copper_link_ich8lan()
1636 hw->mac.ops.init_params = e1000_init_mac_params_ich8lan; in e1000_init_function_pointers_ich8lan()
1637 hw->nvm.ops.init_params = e1000_init_nvm_params_ich8lan; in e1000_init_function_pointers_ich8lan()
1642 hw->phy.ops.init_params = e1000_init_phy_params_ich8lan; in e1000_init_function_pointers_ich8lan()
1647 hw->phy.ops.init_params = e1000_init_phy_params_pchlan; in e1000_init_function_pointers_ich8lan()
1982 ret_val = hw->phy.ops.acquire(hw); in e1000_update_mc_addr_list_pch2lan()
1991 hw->phy.ops.write_reg_page(hw, BM_MTA(i), in e1000_update_mc_addr_list_pch2lan()
1994 hw->phy.ops.write_reg_page(hw, (BM_MTA(i) + 1), in e1000_update_mc_addr_list_pch2lan()
2002 hw->phy.ops.release(hw); in e1000_update_mc_addr_list_pch2lan()
2116 ret_val = hw->phy.ops.acquire(hw); in e1000_sw_lcd_config_ich8lan()
2166 ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2), 1, in e1000_sw_lcd_config_ich8lan()
2171 ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2 + 1), in e1000_sw_lcd_config_ich8lan()
2185 ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr, in e1000_sw_lcd_config_ich8lan()
2192 hw->phy.ops.release(hw); in e1000_sw_lcd_config_ich8lan()
2218 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_gig_workaround_hv()
2225 ret_val = hw->phy.ops.read_reg_locked(hw, BM_CS_STATUS, in e1000_k1_gig_workaround_hv()
2241 ret_val = hw->phy.ops.read_reg_locked(hw, HV_M_STATUS, in e1000_k1_gig_workaround_hv()
2257 ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19), in e1000_k1_gig_workaround_hv()
2264 ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19), in e1000_k1_gig_workaround_hv()
2273 hw->phy.ops.release(hw); in e1000_k1_gig_workaround_hv()
2352 ret_val = hw->phy.ops.acquire(hw); in e1000_oem_bits_config_ich8lan()
2368 ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg); in e1000_oem_bits_config_ich8lan()
2392 !hw->phy.ops.check_reset_block(hw)) in e1000_oem_bits_config_ich8lan()
2395 ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg); in e1000_oem_bits_config_ich8lan()
2398 hw->phy.ops.release(hw); in e1000_oem_bits_config_ich8lan()
2415 ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data); in e1000_set_mdio_slow_mode_hv()
2421 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_MODE_CTRL, data); in e1000_set_mdio_slow_mode_hv()
2451 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 25), 0x4431); in e1000_hv_phy_workarounds_ich8lan()
2456 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, in e1000_hv_phy_workarounds_ich8lan()
2468 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, in e1000_hv_phy_workarounds_ich8lan()
2474 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2480 hw->phy.ops.release(hw); in e1000_hv_phy_workarounds_ich8lan()
2492 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2495 ret_val = hw->phy.ops.read_reg_locked(hw, BM_PORT_GEN_CFG, &phy_data); in e1000_hv_phy_workarounds_ich8lan()
2498 ret_val = hw->phy.ops.write_reg_locked(hw, BM_PORT_GEN_CFG, in e1000_hv_phy_workarounds_ich8lan()
2506 hw->phy.ops.release(hw); in e1000_hv_phy_workarounds_ich8lan()
2523 ret_val = hw->phy.ops.acquire(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2533 hw->phy.ops.write_reg_page(hw, BM_RAR_L(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2535 hw->phy.ops.write_reg_page(hw, BM_RAR_M(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2539 hw->phy.ops.write_reg_page(hw, BM_RAR_H(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2541 hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2549 hw->phy.ops.release(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2589 hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2590 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 20), in e1000_lv_jumbo_workaround_ich8lan()
2655 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2658 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2661 hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
2663 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2666 hw->phy.ops.read_reg(hw, PHY_REG(776, 20), &data); in e1000_lv_jumbo_workaround_ich8lan()
2669 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2672 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0xF100); in e1000_lv_jumbo_workaround_ich8lan()
2675 hw->phy.ops.read_reg(hw, HV_PM_CTRL, &data); in e1000_lv_jumbo_workaround_ich8lan()
2676 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data | in e1000_lv_jumbo_workaround_ich8lan()
2714 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2716 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2719 hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
2721 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2724 hw->phy.ops.read_reg(hw, PHY_REG(776, 20), &data); in e1000_lv_jumbo_workaround_ich8lan()
2727 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2730 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0x7E00); in e1000_lv_jumbo_workaround_ich8lan()
2733 hw->phy.ops.read_reg(hw, HV_PM_CTRL, &data); in e1000_lv_jumbo_workaround_ich8lan()
2734 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data & in e1000_lv_jumbo_workaround_ich8lan()
2741 return hw->phy.ops.write_reg(hw, PHY_REG(769, 20), phy_reg & in e1000_lv_jumbo_workaround_ich8lan()
2763 ret_val = hw->phy.ops.acquire(hw); in e1000_lv_phy_workarounds_ich8lan()
2773 hw->phy.ops.release(hw); in e1000_lv_phy_workarounds_ich8lan()
2796 ret_val = hw->phy.ops.read_reg(hw, HV_M_STATUS, &status_reg); in e1000_k1_workaround_lv()
2807 ret_val = hw->phy.ops.read_reg(hw, HV_PM_CTRL, in e1000_k1_workaround_lv()
2812 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, in e1000_k1_workaround_lv()
2899 if (hw->phy.ops.check_reset_block(hw)) in e1000_post_phy_reset_ich8lan()
2923 hw->phy.ops.read_reg(hw, BM_PORT_GEN_CFG, ®); in e1000_post_phy_reset_ich8lan()
2925 hw->phy.ops.write_reg(hw, BM_PORT_GEN_CFG, reg); in e1000_post_phy_reset_ich8lan()
2945 ret_val = hw->phy.ops.acquire(hw); in e1000_post_phy_reset_ich8lan()
2951 hw->phy.ops.release(hw); in e1000_post_phy_reset_ich8lan()
3000 ret_val = hw->phy.ops.read_reg(hw, HV_OEM_BITS, &oem_reg); in e1000_set_lplu_state_pchlan()
3009 if (!hw->phy.ops.check_reset_block(hw)) in e1000_set_lplu_state_pchlan()
3012 return hw->phy.ops.write_reg(hw, HV_OEM_BITS, oem_reg); in e1000_set_lplu_state_pchlan()
3056 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3062 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3080 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3087 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3093 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3100 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3148 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3155 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3161 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3168 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3190 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3197 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3299 nvm->ops.acquire(hw); in e1000_read_nvm_ich8lan()
3324 nvm->ops.release(hw); in e1000_read_nvm_ich8lan()
3589 nvm->ops.acquire(hw); in e1000_write_nvm_ich8lan()
3596 nvm->ops.release(hw); in e1000_write_nvm_ich8lan()
3629 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_ich8lan()
3737 nvm->ops.release(hw); in e1000_update_nvm_checksum_ich8lan()
3743 nvm->ops.reload(hw); in e1000_update_nvm_checksum_ich8lan()
3787 ret_val = hw->nvm.ops.read(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
3793 ret_val = hw->nvm.ops.write(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
3796 ret_val = hw->nvm.ops.update(hw); in e1000_validate_nvm_checksum_ich8lan()
4060 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_ich8lan()
4096 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_pchlan()
4231 if (!hw->phy.ops.check_reset_block(hw)) { in e1000_reset_hw_ich8lan()
4263 ret_val = hw->phy.ops.get_cfg_done(hw); in e1000_reset_hw_ich8lan()
4313 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_ich8lan()
4331 hw->phy.ops.read_reg(hw, BM_PORT_GEN_CFG, &i); in e1000_init_hw_ich8lan()
4333 hw->phy.ops.write_reg(hw, BM_PORT_GEN_CFG, i); in e1000_init_hw_ich8lan()
4340 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_ich8lan()
4476 if (hw->phy.ops.check_reset_block(hw)) in e1000_setup_link_ich8lan()
4495 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_ich8lan()
4506 ret_val = hw->phy.ops.write_reg(hw, in e1000_setup_link_ich8lan()
4576 ret_val = hw->phy.ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, in e1000_setup_copper_link_ich8lan()
4595 ret_val = hw->phy.ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, in e1000_setup_copper_link_ich8lan()
4702 ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
4706 ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
4715 hw->phy.ops.reset(hw); in e1000_kmrn_lock_loss_workaround_ich8lan()
4794 hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data); in e1000_igp3_phy_powerdown_workaround_ich8lan()
4796 hw->phy.ops.write_reg(hw, IGP3_VR_CTRL, in e1000_igp3_phy_powerdown_workaround_ich8lan()
4800 hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data); in e1000_igp3_phy_powerdown_workaround_ich8lan()
4886 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
4913 hw->phy.ops.read_reg_locked(hw, in e1000_suspend_workarounds_ich8lan()
4917 hw->phy.ops.write_reg_locked(hw, in e1000_suspend_workarounds_ich8lan()
4933 hw->phy.ops.read_reg_locked(hw, I217_PROXY_CTRL, in e1000_suspend_workarounds_ich8lan()
4936 hw->phy.ops.write_reg_locked(hw, I217_PROXY_CTRL, in e1000_suspend_workarounds_ich8lan()
4942 hw->phy.ops.read_reg_locked(hw, I217_SxCTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
4944 hw->phy.ops.write_reg_locked(hw, I217_SxCTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
4947 hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, &phy_reg); in e1000_suspend_workarounds_ich8lan()
4949 hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg); in e1000_suspend_workarounds_ich8lan()
4955 hw->phy.ops.read_reg_locked(hw, I217_CGFREG, &phy_reg); in e1000_suspend_workarounds_ich8lan()
4957 hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg); in e1000_suspend_workarounds_ich8lan()
4960 hw->phy.ops.release(hw); in e1000_suspend_workarounds_ich8lan()
4975 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
4979 hw->phy.ops.release(hw); in e1000_suspend_workarounds_ich8lan()
5017 ret_val = hw->phy.ops.acquire(hw); in e1000_resume_workarounds_pchlan()
5024 hw->phy.ops.read_reg_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg); in e1000_resume_workarounds_pchlan()
5026 hw->phy.ops.write_reg_locked(hw, I217_LPI_GPIO_CTRL, phy_reg); in e1000_resume_workarounds_pchlan()
5033 ret_val = hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, in e1000_resume_workarounds_pchlan()
5038 hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg); in e1000_resume_workarounds_pchlan()
5041 hw->phy.ops.write_reg_locked(hw, I217_PROXY_CTRL, 0); in e1000_resume_workarounds_pchlan()
5044 ret_val = hw->phy.ops.read_reg_locked(hw, I217_CGFREG, in e1000_resume_workarounds_pchlan()
5049 hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg); in e1000_resume_workarounds_pchlan()
5053 hw->phy.ops.release(hw); in e1000_resume_workarounds_pchlan()
5068 return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_cleanup_led_ich8lan()
5086 return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_on_ich8lan()
5104 return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_off_ich8lan()
5121 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, in e1000_setup_led_pchlan()
5135 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, in e1000_cleanup_led_pchlan()
5168 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, data); in e1000_led_on_pchlan()
5200 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, data); in e1000_led_off_pchlan()
5274 if (!(hw->mac.ops.check_mng_mode(hw) || in e1000_power_down_phy_copper_ich8lan()
5275 hw->phy.ops.check_reset_block(hw))) in e1000_power_down_phy_copper_ich8lan()
5316 ret_val = hw->phy.ops.acquire(hw); in e1000_clear_hw_cntrs_ich8lan()
5319 ret_val = hw->phy.ops.set_page(hw, in e1000_clear_hw_cntrs_ich8lan()
5323 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5324 hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5325 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5326 hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5327 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5328 hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5329 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5330 hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5331 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5332 hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5333 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5334 hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5335 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5336 hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5338 hw->phy.ops.release(hw); in e1000_clear_hw_cntrs_ich8lan()