417 	ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3;  member
448 		args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0);  in atombios_crtc_program_ss()
449 		args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK;  in atombios_crtc_program_ss()
452 			args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL;  in atombios_crtc_program_ss()
455 			args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL;  in atombios_crtc_program_ss()
458 			args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL;  in atombios_crtc_program_ss()
463 		args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount);  in atombios_crtc_program_ss()
464 		args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step);  in atombios_crtc_program_ss()
465 		args.v3.ucEnable = enable;  in atombios_crtc_program_ss()
467 			args.v3.ucEnable = ATOM_DISABLE;  in atombios_crtc_program_ss()
526 	ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3;  member
649 				args.v3.sInput.usPixelClock = cpu_to_le16(mode->clock / 10);  in atombios_adjust_pll()
650 				args.v3.sInput.ucTransmitterID = radeon_encoder->encoder_id;  in atombios_adjust_pll()
651 				args.v3.sInput.ucEncodeMode = encoder_mode;  in atombios_adjust_pll()
652 				args.v3.sInput.ucDispPllConfig = 0;  in atombios_adjust_pll()
654 					args.v3.sInput.ucDispPllConfig |=  in atombios_adjust_pll()
657 					args.v3.sInput.ucDispPllConfig |=  in atombios_adjust_pll()
660 					args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10);  in atombios_adjust_pll()
665 						args.v3.sInput.usPixelClock =  in atombios_adjust_pll()
668 						args.v3.sInput.ucDispPllConfig |=  in atombios_adjust_pll()
671 						args.v3.sInput.ucDispPllConfig |=  in atombios_adjust_pll()
676 					args.v3.sInput.ucExtTransmitterID =  in atombios_adjust_pll()
679 					args.v3.sInput.ucExtTransmitterID = 0;  in atombios_adjust_pll()
683 				adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10;  in atombios_adjust_pll()
684 				if (args.v3.sOutput.ucRefDiv) {  in atombios_adjust_pll()
687 					radeon_crtc->pll_reference_div = args.v3.sOutput.ucRefDiv;  in atombios_adjust_pll()
689 				if (args.v3.sOutput.ucPostDiv) {  in atombios_adjust_pll()
692 					radeon_crtc->pll_post_div = args.v3.sOutput.ucPostDiv;  in atombios_adjust_pll()
712 	PIXEL_CLOCK_PARAMETERS_V3 v3;  member
821 			args.v3.usPixelClock = cpu_to_le16(clock / 10);  in atombios_crtc_program_pll()
822 			args.v3.usRefDiv = cpu_to_le16(ref_div);  in atombios_crtc_program_pll()
823 			args.v3.usFbDiv = cpu_to_le16(fb_div);  in atombios_crtc_program_pll()
824 			args.v3.ucFracFbDiv = frac_fb_div;  in atombios_crtc_program_pll()
825 			args.v3.ucPostDiv = post_div;  in atombios_crtc_program_pll()
826 			args.v3.ucPpll = pll_id;  in atombios_crtc_program_pll()
828 				args.v3.ucMiscInfo = PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2;  in atombios_crtc_program_pll()
830 				args.v3.ucMiscInfo = PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1;  in atombios_crtc_program_pll()
832 				args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC;  in atombios_crtc_program_pll()
833 			args.v3.ucTransmitterId = encoder_id;  in atombios_crtc_program_pll()
834 			args.v3.ucEncoderMode = encoder_mode;  in atombios_crtc_program_pll()