425     struct cpu_reg *, struct fw_info *);
426 static void bce_start_cpu			(struct bce_softc *, struct cpu_reg *);
427 static void bce_halt_cpu			(struct bce_softc *, struct cpu_reg *);
4068 bce_load_cpu_fw(struct bce_softc *sc, struct cpu_reg *cpu_reg,  in bce_load_cpu_fw()  argument
4075     bce_halt_cpu(sc, cpu_reg);  in bce_load_cpu_fw()
4078 	offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);  in bce_load_cpu_fw()
4088 	offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base);  in bce_load_cpu_fw()
4098 	offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);  in bce_load_cpu_fw()
4108 	offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);  in bce_load_cpu_fw()
4118 	offset = cpu_reg->spad_base +  in bce_load_cpu_fw()
4119 		(fw->rodata_addr - cpu_reg->mips_view_base);  in bce_load_cpu_fw()
4129 	REG_WR_IND(sc, cpu_reg->inst, 0);  in bce_load_cpu_fw()
4130 	REG_WR_IND(sc, cpu_reg->pc, fw->start_addr);  in bce_load_cpu_fw()
4145 bce_start_cpu(struct bce_softc *sc, struct cpu_reg *cpu_reg)  in bce_start_cpu()  argument
4152 	val = REG_RD_IND(sc, cpu_reg->mode);  in bce_start_cpu()
4153 	val &= ~cpu_reg->mode_value_halt;  in bce_start_cpu()
4154 	REG_WR_IND(sc, cpu_reg->state, cpu_reg->state_value_clear);  in bce_start_cpu()
4155 	REG_WR_IND(sc, cpu_reg->mode, val);  in bce_start_cpu()
4168 bce_halt_cpu(struct bce_softc *sc, struct cpu_reg *cpu_reg)  in bce_halt_cpu()  argument
4175 	val = REG_RD_IND(sc, cpu_reg->mode);  in bce_halt_cpu()
4176 	val |= cpu_reg->mode_value_halt;  in bce_halt_cpu()
4177 	REG_WR_IND(sc, cpu_reg->mode, val);  in bce_halt_cpu()
4178 	REG_WR_IND(sc, cpu_reg->state, cpu_reg->state_value_clear);  in bce_halt_cpu()
4193 	struct cpu_reg cpu_reg;  in bce_start_rxp_cpu()  local
4197 	cpu_reg.mode = BCE_RXP_CPU_MODE;  in bce_start_rxp_cpu()
4198 	cpu_reg.mode_value_halt = BCE_RXP_CPU_MODE_SOFT_HALT;  in bce_start_rxp_cpu()
4199 	cpu_reg.mode_value_sstep = BCE_RXP_CPU_MODE_STEP_ENA;  in bce_start_rxp_cpu()
4200 	cpu_reg.state = BCE_RXP_CPU_STATE;  in bce_start_rxp_cpu()
4201 	cpu_reg.state_value_clear = 0xffffff;  in bce_start_rxp_cpu()
4202 	cpu_reg.gpr0 = BCE_RXP_CPU_REG_FILE;  in bce_start_rxp_cpu()
4203 	cpu_reg.evmask = BCE_RXP_CPU_EVENT_MASK;  in bce_start_rxp_cpu()
4204 	cpu_reg.pc = BCE_RXP_CPU_PROGRAM_COUNTER;  in bce_start_rxp_cpu()
4205 	cpu_reg.inst = BCE_RXP_CPU_INSTRUCTION;  in bce_start_rxp_cpu()
4206 	cpu_reg.bp = BCE_RXP_CPU_HW_BREAKPOINT;  in bce_start_rxp_cpu()
4207 	cpu_reg.spad_base = BCE_RXP_SCRATCH;  in bce_start_rxp_cpu()
4208 	cpu_reg.mips_view_base = 0x8000000;  in bce_start_rxp_cpu()
4211 	bce_start_cpu(sc, &cpu_reg);  in bce_start_rxp_cpu()
4226 	struct cpu_reg cpu_reg;  in bce_init_rxp_cpu()  local
4231 	cpu_reg.mode = BCE_RXP_CPU_MODE;  in bce_init_rxp_cpu()
4232 	cpu_reg.mode_value_halt = BCE_RXP_CPU_MODE_SOFT_HALT;  in bce_init_rxp_cpu()
4233 	cpu_reg.mode_value_sstep = BCE_RXP_CPU_MODE_STEP_ENA;  in bce_init_rxp_cpu()
4234 	cpu_reg.state = BCE_RXP_CPU_STATE;  in bce_init_rxp_cpu()
4235 	cpu_reg.state_value_clear = 0xffffff;  in bce_init_rxp_cpu()
4236 	cpu_reg.gpr0 = BCE_RXP_CPU_REG_FILE;  in bce_init_rxp_cpu()
4237 	cpu_reg.evmask = BCE_RXP_CPU_EVENT_MASK;  in bce_init_rxp_cpu()
4238 	cpu_reg.pc = BCE_RXP_CPU_PROGRAM_COUNTER;  in bce_init_rxp_cpu()
4239 	cpu_reg.inst = BCE_RXP_CPU_INSTRUCTION;  in bce_init_rxp_cpu()
4240 	cpu_reg.bp = BCE_RXP_CPU_HW_BREAKPOINT;  in bce_init_rxp_cpu()
4241 	cpu_reg.spad_base = BCE_RXP_SCRATCH;  in bce_init_rxp_cpu()
4242 	cpu_reg.mips_view_base = 0x8000000;  in bce_init_rxp_cpu()
4307 	bce_load_cpu_fw(sc, &cpu_reg, &fw);  in bce_init_rxp_cpu()
4324 	struct cpu_reg cpu_reg;  in bce_init_txp_cpu()  local
4329 	cpu_reg.mode = BCE_TXP_CPU_MODE;  in bce_init_txp_cpu()
4330 	cpu_reg.mode_value_halt = BCE_TXP_CPU_MODE_SOFT_HALT;  in bce_init_txp_cpu()
4331 	cpu_reg.mode_value_sstep = BCE_TXP_CPU_MODE_STEP_ENA;  in bce_init_txp_cpu()
4332 	cpu_reg.state = BCE_TXP_CPU_STATE;  in bce_init_txp_cpu()
4333 	cpu_reg.state_value_clear = 0xffffff;  in bce_init_txp_cpu()
4334 	cpu_reg.gpr0 = BCE_TXP_CPU_REG_FILE;  in bce_init_txp_cpu()
4335 	cpu_reg.evmask = BCE_TXP_CPU_EVENT_MASK;  in bce_init_txp_cpu()
4336 	cpu_reg.pc = BCE_TXP_CPU_PROGRAM_COUNTER;  in bce_init_txp_cpu()
4337 	cpu_reg.inst = BCE_TXP_CPU_INSTRUCTION;  in bce_init_txp_cpu()
4338 	cpu_reg.bp = BCE_TXP_CPU_HW_BREAKPOINT;  in bce_init_txp_cpu()
4339 	cpu_reg.spad_base = BCE_TXP_SCRATCH;  in bce_init_txp_cpu()
4340 	cpu_reg.mips_view_base = 0x8000000;  in bce_init_txp_cpu()
4405 	bce_load_cpu_fw(sc, &cpu_reg, &fw);  in bce_init_txp_cpu()
4406     bce_start_cpu(sc, &cpu_reg);  in bce_init_txp_cpu()
4421 	struct cpu_reg cpu_reg;  in bce_init_tpat_cpu()  local
4426 	cpu_reg.mode = BCE_TPAT_CPU_MODE;  in bce_init_tpat_cpu()
4427 	cpu_reg.mode_value_halt = BCE_TPAT_CPU_MODE_SOFT_HALT;  in bce_init_tpat_cpu()
4428 	cpu_reg.mode_value_sstep = BCE_TPAT_CPU_MODE_STEP_ENA;  in bce_init_tpat_cpu()
4429 	cpu_reg.state = BCE_TPAT_CPU_STATE;  in bce_init_tpat_cpu()
4430 	cpu_reg.state_value_clear = 0xffffff;  in bce_init_tpat_cpu()
4431 	cpu_reg.gpr0 = BCE_TPAT_CPU_REG_FILE;  in bce_init_tpat_cpu()
4432 	cpu_reg.evmask = BCE_TPAT_CPU_EVENT_MASK;  in bce_init_tpat_cpu()
4433 	cpu_reg.pc = BCE_TPAT_CPU_PROGRAM_COUNTER;  in bce_init_tpat_cpu()
4434 	cpu_reg.inst = BCE_TPAT_CPU_INSTRUCTION;  in bce_init_tpat_cpu()
4435 	cpu_reg.bp = BCE_TPAT_CPU_HW_BREAKPOINT;  in bce_init_tpat_cpu()
4436 	cpu_reg.spad_base = BCE_TPAT_SCRATCH;  in bce_init_tpat_cpu()
4437 	cpu_reg.mips_view_base = 0x8000000;  in bce_init_tpat_cpu()
4502 	bce_load_cpu_fw(sc, &cpu_reg, &fw);  in bce_init_tpat_cpu()
4503 	bce_start_cpu(sc, &cpu_reg);  in bce_init_tpat_cpu()
4518 	struct cpu_reg cpu_reg;  in bce_init_cp_cpu()  local
4523 	cpu_reg.mode = BCE_CP_CPU_MODE;  in bce_init_cp_cpu()
4524 	cpu_reg.mode_value_halt = BCE_CP_CPU_MODE_SOFT_HALT;  in bce_init_cp_cpu()
4525 	cpu_reg.mode_value_sstep = BCE_CP_CPU_MODE_STEP_ENA;  in bce_init_cp_cpu()
4526 	cpu_reg.state = BCE_CP_CPU_STATE;  in bce_init_cp_cpu()
4527 	cpu_reg.state_value_clear = 0xffffff;  in bce_init_cp_cpu()
4528 	cpu_reg.gpr0 = BCE_CP_CPU_REG_FILE;  in bce_init_cp_cpu()
4529 	cpu_reg.evmask = BCE_CP_CPU_EVENT_MASK;  in bce_init_cp_cpu()
4530 	cpu_reg.pc = BCE_CP_CPU_PROGRAM_COUNTER;  in bce_init_cp_cpu()
4531 	cpu_reg.inst = BCE_CP_CPU_INSTRUCTION;  in bce_init_cp_cpu()
4532 	cpu_reg.bp = BCE_CP_CPU_HW_BREAKPOINT;  in bce_init_cp_cpu()
4533 	cpu_reg.spad_base = BCE_CP_SCRATCH;  in bce_init_cp_cpu()
4534 	cpu_reg.mips_view_base = 0x8000000;  in bce_init_cp_cpu()
4599 	bce_load_cpu_fw(sc, &cpu_reg, &fw);  in bce_init_cp_cpu()
4600 	bce_start_cpu(sc, &cpu_reg);  in bce_init_cp_cpu()
4615 	struct cpu_reg cpu_reg;  in bce_init_com_cpu()  local
4620 	cpu_reg.mode = BCE_COM_CPU_MODE;  in bce_init_com_cpu()
4621 	cpu_reg.mode_value_halt = BCE_COM_CPU_MODE_SOFT_HALT;  in bce_init_com_cpu()
4622 	cpu_reg.mode_value_sstep = BCE_COM_CPU_MODE_STEP_ENA;  in bce_init_com_cpu()
4623 	cpu_reg.state = BCE_COM_CPU_STATE;  in bce_init_com_cpu()
4624 	cpu_reg.state_value_clear = 0xffffff;  in bce_init_com_cpu()
4625 	cpu_reg.gpr0 = BCE_COM_CPU_REG_FILE;  in bce_init_com_cpu()
4626 	cpu_reg.evmask = BCE_COM_CPU_EVENT_MASK;  in bce_init_com_cpu()
4627 	cpu_reg.pc = BCE_COM_CPU_PROGRAM_COUNTER;  in bce_init_com_cpu()
4628 	cpu_reg.inst = BCE_COM_CPU_INSTRUCTION;  in bce_init_com_cpu()
4629 	cpu_reg.bp = BCE_COM_CPU_HW_BREAKPOINT;  in bce_init_com_cpu()
4630 	cpu_reg.spad_base = BCE_COM_SCRATCH;  in bce_init_com_cpu()
4631 	cpu_reg.mips_view_base = 0x8000000;  in bce_init_com_cpu()
4696 	bce_load_cpu_fw(sc, &cpu_reg, &fw);  in bce_init_com_cpu()
4697 	bce_start_cpu(sc, &cpu_reg);  in bce_init_com_cpu()