Lines Matching refs:RC
82 const TargetRegisterClass *RC = MRI.getRegClass(Reg); in mask() local
83 unsigned ID = RC->getID(); in mask()
203 auto lo = [this] (const BT::RegisterCell &RC, uint16_t RW) in evaluate()
205 assert(RW <= RC.width()); in evaluate()
206 return eXTR(RC, 0, RW); in evaluate()
209 auto hi = [this] (const BT::RegisterCell &RC, uint16_t RW) in evaluate() argument
211 uint16_t W = RC.width(); in evaluate()
213 return eXTR(RC, W-RW, W); in evaluate()
216 auto half = [this] (const BT::RegisterCell &RC, unsigned N) in evaluate() argument
218 assert(N*16+16 <= RC.width()); in evaluate()
219 return eXTR(RC, N*16, N*16+16); in evaluate()
226 RegisterCell RC = eXTR(Rt, I*BW, I*BW+BW).cat(eXTR(Rs, I*BW, I*BW+BW)); in evaluate() local
229 RC.cat(eXTR(Rt, I*BW, I*BW+BW)).cat(eXTR(Rs, I*BW, I*BW+BW)); in evaluate()
232 return RC; in evaluate()
261 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); in evaluate() local
262 RC.fill(0, L, BT::BitValue::Zero); in evaluate()
263 return rr0(RC, Outputs); in evaluate()
277 RegisterCell RC = RegisterCell(RW).insert(PC, BT::BitMask(0, PW-1)); in evaluate() local
278 RC.fill(PW, RW, BT::BitValue::Zero); in evaluate()
279 return rr0(RC, Outputs); in evaluate()
282 RegisterCell RC = RegisterCell::self(Reg[0].Reg, W0); in evaluate() local
284 return rr0(eINS(RC, eXTR(rc(1), 0, W0), 0), Outputs); in evaluate()
298 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate() local
299 return rr0(RC, Outputs); in evaluate()
307 RegisterCell RC = eADD(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
308 return rr0(RC, Outputs); in evaluate()
311 RegisterCell RC = eADD(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
312 return rr0(RC, Outputs); in evaluate()
315 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate() local
316 return rr0(RC, Outputs); in evaluate()
320 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0)); in evaluate() local
321 return rr0(RC, Outputs); in evaluate()
325 RegisterCell RC = eADD(eIMM(im(1), W0), lo(M, W0)); in evaluate() local
326 return rr0(RC, Outputs); in evaluate()
330 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
331 return rr0(RC, Outputs); in evaluate()
335 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
336 return rr0(RC, Outputs); in evaluate()
340 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
341 return rr0(RC, Outputs); in evaluate()
344 RegisterCell RC = eADD(rc(1), eSUB(eIMM(im(2), W0), rc(3))); in evaluate() local
345 return rr0(RC, Outputs); in evaluate()
348 RegisterCell RC = eADD(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate() local
349 return rr0(RC, Outputs); in evaluate()
352 RegisterCell RC = eADD(rc(1), eADD(rc(2), rc(3))); in evaluate() local
353 return rr0(RC, Outputs); in evaluate()
356 RegisterCell RC = eADD(rc(1), eSUB(rc(2), rc(3))); in evaluate() local
357 return rr0(RC, Outputs); in evaluate()
360 RegisterCell RC = eADD(rc(1), eASL(rc(2), im(3))); in evaluate() local
361 return rr0(RC, Outputs); in evaluate()
374 RegisterCell RC = eSUB(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
375 return rr0(RC, Outputs); in evaluate()
378 RegisterCell RC = eSUB(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
379 return rr0(RC, Outputs); in evaluate()
382 RegisterCell RC = eSUB(rc(1), eADD(rc(2), eIMM(im(3), W0))); in evaluate() local
383 return rr0(RC, Outputs); in evaluate()
386 RegisterCell RC = eSUB(rc(1), eADD(rc(2), rc(3))); in evaluate() local
387 return rr0(RC, Outputs); in evaluate()
409 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
410 return rr0(RC, Outputs); in evaluate()
414 RegisterCell RC = eSUB(rc(1), lo(M, W0)); in evaluate() local
415 return rr0(RC, Outputs); in evaluate()
419 RegisterCell RC = eADD(rc(1), lo(M, W0)); in evaluate() local
420 return rr0(RC, Outputs); in evaluate()
457 RegisterCell RC = eAND(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
458 return rr0(RC, Outputs); in evaluate()
461 RegisterCell RC = eAND(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
462 return rr0(RC, Outputs); in evaluate()
481 RegisterCell RC = eORL(eIMM(im(1), W0), eASL(rc(2), im(3))); in evaluate() local
482 return rr0(RC, Outputs); in evaluate()
485 RegisterCell RC = eORL(eIMM(im(1), W0), eLSR(rc(2), im(3))); in evaluate() local
486 return rr0(RC, Outputs); in evaluate()
494 RegisterCell RC = eORL(rc(1), eAND(rc(2), eIMM(im(3), W0))); in evaluate() local
495 return rr0(RC, Outputs); in evaluate()
498 RegisterCell RC = eORL(rc(1), eORL(rc(2), eIMM(im(3), W0))); in evaluate() local
499 return rr0(RC, Outputs); in evaluate()
567 RegisterCell RC = eASR(eADD(eASR(XC, im(2)), eIMM(1, 2*W0)), 1); in evaluate() local
568 return rr0(eXTR(RC, 0, W0), Outputs); in evaluate()
576 RegisterCell RC = eLSR(eADD(eASR(XC, S-1), eIMM(1, 2*W0)), 1); in evaluate() local
577 return rr0(eXTR(RC, 0, W0), Outputs); in evaluate()
605 RegisterCell RC = rc(1); in evaluate() local
606 RC[im(2)] = BT::BitValue::Zero; in evaluate()
607 return rr0(RC, Outputs); in evaluate()
610 RegisterCell RC = rc(1); in evaluate() local
611 RC[im(2)] = BT::BitValue::One; in evaluate()
612 return rr0(RC, Outputs); in evaluate()
615 RegisterCell RC = rc(1); in evaluate() local
617 RC[BX] = RC[BX].is(0) ? BT::BitValue::One in evaluate()
618 : RC[BX].is(1) ? BT::BitValue::Zero in evaluate()
620 return rr0(RC, Outputs); in evaluate()
631 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate() local
632 return rr0(RC, Outputs); in evaluate()
647 RegisterCell RC = RegisterCell(W0).insert(Ext, BT::BitMask(0, Wd-1)); in evaluate() local
649 return rr0(eZXT(RC, Wd), Outputs); in evaluate()
650 return rr0(eSXT(RC, Wd), Outputs); in evaluate()
685 RegisterCell RC = half(R2, LoH).cat(half(R1, HiH)); in evaluate() local
686 return rr0(RC, Outputs); in evaluate()
693 RegisterCell RC = half(R2, 0).cat(half(R1, 0)).cat(half(R2, 1)) in evaluate() local
695 return rr0(RC, Outputs); in evaluate()
698 RegisterCell RC = shuffle(rc(1), rc(2), 8, false); in evaluate() local
699 return rr0(RC, Outputs); in evaluate()
702 RegisterCell RC = shuffle(rc(1), rc(2), 16, false); in evaluate() local
703 return rr0(RC, Outputs); in evaluate()
706 RegisterCell RC = shuffle(rc(1), rc(2), 8, true); in evaluate() local
707 return rr0(RC, Outputs); in evaluate()
710 RegisterCell RC = shuffle(rc(1), rc(2), 16, true); in evaluate() local
711 return rr0(RC, Outputs); in evaluate()
718 RegisterCell RC(WR); in evaluate() local
722 RC.fill(i*8, i*8+8, F); in evaluate()
724 return rr0(RC, Outputs); in evaluate()
754 RegisterCell RC = eSXT(rc(1).cat(eIMM(0, W1)), W1); in evaluate() local
755 return rr0(RC, Outputs); in evaluate()
803 RegisterCell RC(W0); in evaluate() local
804 RC.fill(0, W0, (All1 ? BT::BitValue::One : BT::BitValue::Zero)); in evaluate()
805 return rr0(RC, Outputs); in evaluate()
820 RegisterCell RC(W0); in evaluate() local
821 RC.fill(0, W0, (Has1 ? BT::BitValue::One : BT::BitValue::Zero)); in evaluate()
822 return rr0(RC, Outputs); in evaluate()