Lines Matching refs:GPR64RegClass
489 if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) { in insertSelect()
490 RC = &AArch64::GPR64RegClass; in insertSelect()
1129 AArch64::GPR64RegClass.contains(DstReg)); in isGPRCopy()
1760 AArch64::GPR64RegClass.contains(SrcReg)) { in copyPhysReg()
1765 if (AArch64::GPR64RegClass.contains(DestReg) && in copyPhysReg()
1786 assert(AArch64::GPR64RegClass.contains(SrcReg) && "Invalid NZCV copy"); in copyPhysReg()
1795 assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy"); in copyPhysReg()
1845 MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass); in storeRegToStackSlot()
1943 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass); in loadRegFromStackSlot()
2080 MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass); in foldMemoryOperandImpl()
2085 MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass); in foldMemoryOperandImpl()
2691 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2706 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2732 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2774 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2798 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
2824 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()