Lines Matching refs:Cnt
6194 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { in getVShiftImm() argument
6206 Cnt = SplatBits.getSExtValue(); in getVShiftImm()
6214 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) { in isVShiftLImm() argument
6217 if (!getVShiftImm(Op, ElementBits, Cnt)) in isVShiftLImm()
6219 return (Cnt >= 0 && (isLong ? Cnt - 1 : Cnt) < ElementBits); in isVShiftLImm()
6229 int64_t &Cnt) { in isVShiftRImm() argument
6232 if (!getVShiftImm(Op, ElementBits, Cnt)) in isVShiftRImm()
6235 Cnt = -Cnt; in isVShiftRImm()
6236 return (Cnt >= 1 && Cnt <= (isNarrow ? ElementBits / 2 : ElementBits)); in isVShiftRImm()
6243 int64_t Cnt; in LowerVectorSRA_SRL_SHL() local
6254 if (isVShiftLImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize) in LowerVectorSRA_SRL_SHL()
6256 DAG.getConstant(Cnt, DL, MVT::i32)); in LowerVectorSRA_SRL_SHL()
6264 if (isVShiftRImm(Op.getOperand(1), VT, false, false, Cnt) && in LowerVectorSRA_SRL_SHL()
6265 Cnt < EltSize) { in LowerVectorSRA_SRL_SHL()
6269 DAG.getConstant(Cnt, DL, MVT::i32)); in LowerVectorSRA_SRL_SHL()