MidnightBSD Magus

cad/verilog-mode.el

Emacs lisp modules for the Verilog language

Flavor Version Run OSVersion Arch License Restricted Build Fetch Test Scan
devel_full 801_25 642 4.1 amd64 gpl3+ 0 warn pass pass warn

License Permissions:

Events

Machine Phase Type Time Message
m4164b fetch info 2026-07-06 06:14:29.634443 Fetch Started
m4164b fetch pass 2026-07-06 06:14:30.738834 Fetch complete.
m4164b build info 2026-07-19 12:23:17.766006 Build Started
m4164b build warn 2026-07-19 12:26:40.939899 MASTER_SITES contains non-HTTPS URLs: http://www.veripool.org/ftp/
m4164b build warn 2026-07-19 12:26:41.680914 Build complete.
m4164b scan info 2026-07-20 05:51:56.847722 Scan Started
m4164b scan info 2026-07-20 05:52:14.267042 Virus scan passed.
m4164b scan warn 2026-07-20 05:52:14.300832 YARA found suspicious port shell content.
m4164b scan warn 2026-07-20 05:52:14.5326 MASTER_SITES contains domain not in source allowlist: www.veripool.org
m4164b scan warn 2026-07-20 05:52:14.557421 Scan complete.
m4164b test info 2026-07-21 11:52:33.143788 Test Started
m4164b test pass 2026-07-21 11:55:36.840413 Test complete.

scan Log

== ClamAV package scan ==
/mnt/magus/packages/642/verilog-mode.el-emacs_devel-801_25.mport: OK

== YARA port-file scan ==
/usr/mports/cad/verilog-mode.el/Makefile(1): error: syntax error, unexpected identifier
/usr/mports/cad/verilog-mode.el/Makefile(28): error: unterminated regular expression

== Source integrity scan ==
Compared cad/verilog-mode.el between 177ae033a7ad8459e5e20760b547a2b46a0c1e79 and ae7a94b0701c78a0a8609969f55d4db537ab87cf.
Changed files:
  cad/verilog-mode.el/Makefile
Warnings:
  SourceIntegrityUnknownMasterSiteDomain: MASTER_SITES contains domain not in source allowlist: www.veripool.org

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LLM Analysis